arm-trusted-firmware

Commit Graph

Author	SHA1	Message	Date
Antonio Nino Diaz	93c78ed231	libc: Fix all includes in codebase The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>	2018-08-22 10:26:05 +01:00
Anson Huang	ff2743e544	Support for NXP's i.MX8 SoCs IPC NXP's i.MX8 SoCs have system controller (M4 core) which takes control of clock management, power management, partition management, PAD management etc., other clusters like Cortex-A35 can send out command via MU (Message Unit) to system controller for clock/power management etc.. This patch adds basic IPC(inter-processor communication) support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>	2018-06-19 10:24:28 +08:00

Author

SHA1

Message

Date

Antonio Nino Diaz

93c78ed231

libc: Fix all includes in codebase

The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.

Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

2018-08-22 10:26:05 +01:00

Anson Huang

ff2743e544

Support for NXP's i.MX8 SoCs IPC

NXP's i.MX8 SoCs have system controller (M4 core)
which takes control of clock management, power management,
partition management, PAD management etc., other
clusters like Cortex-A35 can send out command via MU
(Message Unit) to system controller for clock/power
management etc..

This patch adds basic IPC(inter-processor communication) support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

2018-06-19 10:24:28 +08:00

2 Commits