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7 Commits

Author SHA1 Message Date
Pali Rohár 583079ae06 docs: marvell: update ddr3 build instructions 
Add information about 2GB variant of EspressoBin V5 and use Marvell git
branches which contain required fixes for EspressoBin.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I1db510f1576f4762259ad7b0c10024b8ab434a59
 2020-10-11 15:10:54 +02:00
Marcin Wojtas 1d935a1b55 docs: marvell: update mv_ddr branch 
Now that the BLE image sources (mv_ddr) are updated, reflect
the proper branch in the Armada build howto.

Change-Id: I959d1343d0dfdd681c7e39bdcaed9b36aaddfca1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
 2020-10-04 16:02:28 +02:00
Konstantin Porotchkin eed02440af docs: marvell: update build instructions with CN913x 
Add references to the OcteonTX2 CN913x family.

Change-Id: I172a8e3d061086bf4843acad014c113c80359e01
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
 2020-07-30 15:15:52 +02:00
Konstantin Porotchkin 0a977b9b8b plat: marvell: armada: a8k: change CCU LLC SRAM mapping 
The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage.
The CCU have to prepare SRAM window, but point to the DRAM-0 target
until the SRAM is actually enabled.
This patch changes CCU SRAM window target to DRAM-0
Remove dependence between LLC_SRAM and LLC_ENABLE and update the
build documentation.
The SRAМ base moved to follow the OP-TEE SHMEM area (0x05400000)

Change-Id: I85c2434a3d515ec37da5ae8eb729e3280f91c456
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
 2020-07-10 10:55:23 +00:00
Konstantin Porotchkin 5a40d70f06 drivers: marvell: add support for mapping the entire LLC to SRAM 
Add llc_sram_enable() and llc_sram_disable() APIs to Marvell
cache_lls driver.
Add LLC_SRAM definition to Marvell common makefile - disabled
by the default.
Add description of LLC_SRAM flag to the build documentation.

Change-Id: Ib348e09752ce1206d29268ef96c9018b781db182
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
 2020-06-19 18:03:29 +02:00
Alex Leibovich 57adbf37e6 ddr: a80x0: add DDR 32-bit mode support 
This commit introduces 32-bit DDR topology map initialization.
For that purpose a new DDR32 build flag is added, with
according documentation update.

Change-Id: I169ff358c2923afd984e27bc126dc551dcaefc01
Signed-off-by: Alex Leibovich <alexl@marvell.com>
 2020-06-07 00:06:03 +02:00
Grzegorz Jaszczyk a28471722a marvell: armada: add extra level in marvell platform hierarchy 
This commit is a preparation for upcoming support for OcteonTX and
OcteonTX2 product families. Armada platform related files (docs,
plat, include/plat) are moved to the new "armada" sub-folder.

Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
 2020-06-07 00:06:03 +02:00