Commit Graph

10758 Commits

Author SHA1 Message Date
Manish Pandey f41a85e9cb Merge "fix(st): add missing header include" into integration 2022-05-10 14:36:46 +02:00
Olivier Deprez 18c3320859 Merge "fix(cm): add barrier before el3 ns exit" into integration 2022-05-10 14:15:51 +02:00
Marc Bonnici c2b1434369 feat(spmc): add helper to obtain a partitions FF-A version
Add a helper function to obtain the FF-A version of a calling
partition. This is used to ensure that the SPMC maintains
backwards compatibility if the partition implements a lower
minor version for the same major version than the SPMC.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I5b364a1e510a999bb0c4cacae28f23f8a42a1e3e
2022-05-10 09:38:57 +01:00
Marc Bonnici 9576fa93a2 feat(spmd): enable SPMD to forward FFA_VERSION to EL3 SPMC
In order to allow the EL3 SPMC to know the FF-A version of the
entity running in the normal world, allow the SPMD to
forward the call rather than replying on its behalf.

This solution works as the EL3 can ERET directly back to
the calling partition however this is not an option
when the SPMC resides in a lower exception level. A new
approach will be required to support such scenario.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ic2d6e49c06340167eadefe893c6e1e20b67ab498
2022-05-10 09:36:20 +01:00
Marc Bonnici 0c7707fdf2 feat(spmc): enable handling FFA_VERSION ABI
Report the SPMC version to the caller, currently v1.1 and
also store the requested version to allow the SPMC to
use the corresponding FF-A version in future ABI calls.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I79aafd1e6694cbd4b231bbd0cac5834a71063d79
2022-05-10 09:36:20 +01:00
Marc Bonnici f16b6ee3de feat(spmc): add helper function to obtain endpoint mailbox
Add a helper function to obtain the relevant mailbox buffers
depending on which entity was last run. This will be used in
subsequent functionality to populate requested information in
the callers RX buffer.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I85959ced4d1454be05a7b3fb6853ed3ab7f0cf3e
2022-05-10 09:36:20 +01:00
Marc Bonnici a7c00505f8 feat(spmc): add helper function to obtain hyp structure
We assume that the first descriptor in the normal world
endpoints is reserved for the hypervisor and add a helper
function to enable retrieving this directly.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I67c3589994eb820ef420db6ab7e8bd0825d64455
2022-05-10 09:36:20 +01:00
Marc Bonnici 3de378ff8c feat(spmc): enable parsing of messaging methods from manifest
Ensure that the `messaging-methods` entry is populated in
an SP's manifest. Currently only direct messaging is supported
so alert if this does not match the manifest entry.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I67f1fad71a3507627993a004e0f8579388faf178
2022-05-10 09:36:15 +01:00
kadabi 701e94b08f feat(snprintf): add support for length specifiers
Add long, long long and size_t length specifiers to
snprintf similar to vprintf. This will help capturing
all the UART logs into a logbuffer and makes snprintf
functionally equivalent to vprintf.

Change-Id: Ib9bd20e2b040c9b8755cf7ed7c9b4da555604810
Signed-off-by: Channagoud kadabi <kadabi@google.com>
2022-05-10 01:01:12 +02:00
John Powell 3b577ed53d fix(errata): workaround for Cortex-A78 erratum 2395406
Cortex-A78 erratum 2395406 is a cat B erratum that applies to revisions
r0p0 - r1p2 and is still open. The workaround is to set bit[40] of
CPUACTLR2 which will disable folding of demand requests into older
prefetches with L2 miss requests outstanding.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401784

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: If06f988f05f925c2a4bed3e6a9414b6acdfec894
2022-05-10 00:04:24 +02:00
johpow01 af220ebbe4 fix(errata): workaround for Cortex-A710 erratum 2008768
Cortex-A710 erratum 2008768 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to clear
the ED bit in each ERXCTLR_EL1 register before setting the PWRDN bit in
CPUPWRCTLR_EL1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ib2171c06da762dd4155b02c03d86766f1616381d
2022-05-09 20:02:10 +02:00
John Powell 5d796b3a25 fix(errata): workaround for Cortex-A78 erratum 2376745
Cortex-A78 erratum 2376745 is a cat B erratum that applies to revisions
r0p0 - r1p2 and is still open. The workaround is to set bit[0] of
CPUACTLR2 which will force PLDW/PFRM ST to behave like PLD/PRFM LD and
not cause invalidation to other PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401784

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I6f1a3a7d613c5ed182a7028f912e0f6ae3aa7f98
2022-05-09 19:09:22 +02:00
Olivier Deprez 04825031b2 fix(cm): add barrier before el3 ns exit
In cm_prepare_el3_exit_ns, SCR_EL3.NS bit change (to non-secure) is not
committed before the EL2 restoration sequence happens.
At ICC_SRE_EL2 write in cm_el2_sysregs_context_restore, NS is still 0
from CPU perspective (with EEL2=0) which is an invalid condition and
triggers a fault. By adding ISB, SCR_EL3 gets synced with NS=1/EEL2=0
before ICC_SRE_EL2 write.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ie72a6152aa7729e66b3344c1b7b0749f54cafb6f
2022-05-09 17:41:29 +02:00
Manish Pandey c3bdd3d3cf Merge changes Idfd268cd,I362445b9,Ibea052d3,I28cb8f74,I501ae76a, ... into integration
* changes:
  feat(imx8mp): enable BL32 fdt overlay support on imx8mp
  feat(imx8mq): enable optee fdt overlay support
  feat(imx8mn): enable optee fdt overlay support
  feat(imx8mm): enable optee fdt overlay support
  feat(imx8mp): add trusty for imx8mp
  feat(imx8mq): enable trusty for imx8mq
  feat(imx8mn): enable Trusty OS for imx8mn
  feat(imx8mm): enable Trusty OS on imx8mm
  feat(imx8/imx8m): switch to xlat_tables_v2
  feat(imx8m): enable the coram_s tz by default on imx8mn/mp
  feat(imx8m): enable the csu init on imx8m
  feat(imx8m): add a simple csu driver for imx8m family
  refactor(imx8m): replace magic number with enum type
  feat(imx8m): add imx csu/rdc enum type defines for imx8m
  fix(imx8m): check the validation of domain id
  feat(imx8m): enable conditional build for SDEI
2022-05-09 11:30:50 +02:00
Manish Pandey 42f31f5f10 Merge "feat(plat/imx8m): do not release JR0 to NS if HAB is using it" into integration 2022-05-09 10:40:00 +02:00
Jacky Bai aeff14640a feat(imx8mp): enable BL32 fdt overlay support on imx8mp
Allow OP-TEE to generate a device-tree overlay binary
that will be applied by u-boot on the regular dtb.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Idfd268cdd8b7ba321f8e1b9b85c2bba7ffdeddf0
2022-05-07 17:33:58 +08:00
Silvano di Ninno 023750c6a8 feat(imx8mq): enable optee fdt overlay support
Enable optee fdt overlay support

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I362445b93dc293a27c99b0d20a73f6b06ad0cd39
2022-05-07 17:33:58 +08:00
Silvano di Ninno 2612891288 feat(imx8mn): enable optee fdt overlay support
Enable optee fdt overlay support.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ibea052d35bf746475b8618b3a879eea80875333c
2022-05-07 17:33:58 +08:00
Silvano di Ninno 9d0eed111c feat(imx8mm): enable optee fdt overlay support
Enable optee fdt overlay support.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I28cb8f744236868727ef4a09d7d2946070404d4d
2022-05-07 17:33:58 +08:00
Jacky Bai 8b9c21b480 feat(imx8mp): add trusty for imx8mp
Add trusty support on i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I501ae76ac35b8c059b3f0a9ce1d51ed13cbdbfe2
2022-05-07 17:33:58 +08:00
Ji Luo a18e393339 feat(imx8mq): enable trusty for imx8mq
Add trusty support for imx8mq, default load address
and size for trusty os will be 0xfe000000 and 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2b35ee525b25b80bf6c9599a0adcc2d9f069aa41
2022-05-07 17:33:58 +08:00
Ji Luo 99349c8ecb feat(imx8mn): enable Trusty OS for imx8mn
Add trusty support for imx8mn, default load address and
size of trusty are 0xbe000000 and 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I63fd5159027d7400b8c6bfc03193dd1330c43140
2022-05-07 17:33:58 +08:00
Ji Luo ff3acfe3cc feat(imx8mm): enable Trusty OS on imx8mm
Add trusty support for imx8mm, default load address
and size of trusty are 0xbe000000 anx 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I3f8b1adc08933e38a39f1ab1723947319d19a703
2022-05-07 17:33:58 +08:00
Ji Luo 4f8d5b018e feat(imx8/imx8m): switch to xlat_tables_v2
spd trusty requires memory dynamic mapping feature to be
enabled, so we have to use xlat table library v2 instead
of v1.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2813af9c7878b1fc2a59e27619c5b643af6a1e91
2022-05-07 17:33:58 +08:00
Jacky Bai d5ede92d78 feat(imx8m): enable the coram_s tz by default on imx8mn/mp
Enable the OCRAM_S TZ for secure protection by default on
i.MX8MN/i.MX8MP. And lock the ocram secure access configure
on i.MX8MM/i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2e24f4b823ee5f804415218d5c2e371f4e4c6fe1
2022-05-07 17:33:58 +08:00
Jacky Bai 0a76495bc2 feat(imx8m): enable the csu init on imx8m
Enable the CSU init on i.MX8M SoC family. The 'csu_cfg' array
is just a placeholder for now as example with limited config listed.
In real use case,user can add the CSU config as needed based on system design.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I1f7999efa346f18f6625ed8c478d088ed75f7833
2022-05-07 17:33:58 +08:00
Jacky Bai 71c40d3bb7 feat(imx8m): add a simple csu driver for imx8m family
Add a simple CSU driver for i.MX8M family.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I0eda3561e7a38a232acdb8e043c7200c630f7e22
2022-05-07 17:33:58 +08:00
Jacky Bai d76f012ea8 refactor(imx8m): replace magic number with enum type
Replace those RDC config related magic numbers with enum type

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6245ccfa74d079179dc0f205980c2daf5c7af786
2022-05-07 17:26:51 +08:00
Jacky Bai 0c6dfc4784 feat(imx8m): add imx csu/rdc enum type defines for imx8m
Add various enum type defines for CSU & RDC module for i.MX8M
family

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I70c050286919eab51c6c553912bd4be57bc60f81
2022-05-07 16:57:18 +08:00
Jacky Bai eb7fb938c3 fix(imx8m): check the validation of domain id
check the domain id to make sure it is in the valid range
to make sure no out of range access to the array.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Iccd7298eea390b6e68156bb356226839a23417ea
2022-05-07 16:32:05 +08:00
Jacky Bai d2a339dfa1 feat(imx8m): enable conditional build for SDEI
SDEI support on imx8m is an optional feature, so
make it conditional build, not enabled by default.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6e7e8d77959ea352bc019f8468793992ec7ecfc4
2022-05-07 16:30:03 +08:00
Madhukar Pappireddy 13ce03aa8a Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration 2022-05-06 19:33:59 +02:00
Manish Pandey 026dfed89d Merge "feat(intel): implement timer init divider via cpu frequency. (#1)" into integration 2022-05-06 18:53:25 +02:00
Manish Pandey 968ffba270 Merge "docs(maintainers): add new owners for Trusty SPD" into integration 2022-05-06 18:51:26 +02:00
Franck LENORMAND 77850c96f2 feat(plat/imx8m): do not release JR0 to NS if HAB is using it
In case JR0 is used by the HAB for secure boot, it can be used later
for authenticating kernel or other binaries.

We are checking if the HAB is using the JR by the DID set.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6e9595012262ffabfc3f3d4841f446f34e48e059
2022-05-06 17:53:15 +02:00
Marco Nelissen 3db9a39cb7 docs(maintainers): add new owners for Trusty SPD
Split TLK/Trusty SPD into two separate components and add additional
owners for Trusty SPD.

Signed-off-by: Marco Nelissen <marcone@google.com>
Change-Id: Ifabd1bb630fe4976e304fa29eac1c516ec6e2e18
2022-05-06 17:50:26 +02:00
Manish Pandey efceb6bead Merge changes Iaf21883b,I523c5d57,I57164923 into integration
* changes:
  fix(ufs): read and write attribute based on spec
  fix(ufs): disables controller if enabled
  refactor(ufs): adds a function for fdeviceinit
2022-05-06 17:47:28 +02:00
BenjaminLimJL f65bdf3a54 feat(intel): implement timer init divider via cpu frequency. (#1)
Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
2022-05-06 17:37:45 +02:00
Sandrine Bailleux 2c87fabab5 Merge "fix(st): fix NULL pointer dereference issues" into integration 2022-05-06 16:53:24 +02:00
Olivier Deprez 44b9d577c0 Merge changes from topic "ffa_el3_spmc" into integration
* changes:
  feat(spmc): enable checking of execution ctx count
  feat(spmc): enable parsing of UUID from SP Manifest
  feat(spmc): add partition mailbox structs
  feat(plat/arm): allow BL32 specific defines to be used by SPMC_AT_EL3
  feat(plat/fvp): add EL3 SPMC #defines
  test(plat/fvp/lsp): add example logical partition
  feat(spmc/lsp): add logical partition framework
2022-05-06 15:58:03 +02:00
Yann Gautier b1391b294c fix(st): add missing header include
This issue is triggered when enabling -Wmissing-prototypes:
plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype
 for 'open_fip' [-Wmissing-prototypes]
  114 | int open_fip(const uintptr_t spec)
      |     ^~~~~~~~
plat/st/common/bl2_io_storage.c:119:5: warning: no previous prototype
 for 'open_storage' [-Wmissing-prototypes]
  119 | int open_storage(const uintptr_t spec)
      |     ^~~~~~~~~~~~

Add missing stm32mp_io_storage.h header include, where those functions
prototypes are defined.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2af69fadfc4780553f41b338cd93b731210672a6
2022-05-06 15:52:38 +02:00
Manish Pandey fad4a7175b Merge changes from topic "xlnx_zynqmp_misra" into integration
* changes:
  fix(zynqmp): resolve misra R14.4 warnings
  fix(zynqmp): resolve misra R16.3 warnings
  fix(zynqmp): resolve misra R15.7 warnings
  fix(zynqmp): resolve misra R15.6 warnings
  fix(zynqmp): resolve misra 7.2 warnings
  fix(zynqmp): resolve misra R10.3
2022-05-06 15:51:25 +02:00
Manish Pandey e8ad39759b Merge "feat(brbe): add BRBE support for NS world" into integration 2022-05-06 12:46:03 +02:00
Olivier Deprez 78c82cd099 Merge changes from topic "ja/boot_protocol" into integration
* changes:
  fix(sptool): update Optee FF-A manifest
  feat(sptool): delete c version of the sptool
  feat(sptool): use python version of sptool
  feat(sptool): python version of the sptool
  refactor(sptool): use SpSetupActions in sp_mk_generator.py
  feat(sptool): add python SpSetupActions framework
2022-05-06 11:52:55 +02:00
Venkatesh Yadav Abbarapu c884c9a55b fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1
Enable ARM_XLAT_TABLES_LIB_V1 as ZynqMP is using
v1 library of translation tables.

With upstream patch d323af9e3d,
the usage of MAP_REGION_FLAT is referring to definition in file
include/lib/xlat_tables/xlat_tables_v2.h but while preparing
xlat tables in lib/xlat_tables/xlat_tables_common.c it is referring
to include/lib/xlat_tables/xlat_tables.h which is v1 xlat tables.
Also, ZynqMP was using v1 so defined ARM_XLAT_TABLES_LIB_V1 to
use v1 xlat tables everywhere.
This fixes the issue of xlat tables failures as it takes v2
library mmap_region structure in some files and v1 in other
files.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibc0e1c536e19f4edd6a6315bf1b0dfcec33e2fdc
2022-05-06 14:55:47 +05:30
Yann Gautier 2deff904a9 fix(st): fix NULL pointer dereference issues
The get_bl_mem_params_node() function could return NULL. Add asserts to
check the return value is not NULL.
This corrects coverity issues:
	pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "pager_mem_params", which is known to be "NULL".

	paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "paged_mem_params", which is known to be "NULL".

	tos_fw_mem_params = get_bl_mem_params_node(TOS_FW_CONFIG_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "tos_fw_mem_params", which is known to be "NULL".


Do the same for other occurrences of get_bl_mem_params_node() return not
checked, in the functions plat_get_bl_image_load_info() and
bl2_plat_handle_pre_image_load().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I79165b1628fcee3da330f2db4ee5e1dafcb1b21f
2022-05-06 11:00:15 +02:00
Venkatesh Yadav Abbarapu dd1fe7178b fix(zynqmp): resolve misra R14.4 warnings
MISRA Violation: MISRA-C:2012 R.14.4
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially Boolean type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I8f3f6f956d1d58ca201fb5895f12bcaabf2afd3b
2022-05-06 13:45:27 +05:30
Venkatesh Yadav Abbarapu e7e5d30308 fix(zynqmp): resolve misra R16.3 warnings
MISRA Violation: MISRA-C:2012 R.16.3
- An unconditional break statement shall terminate every switch-clause.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I96a8b627c593ff1293b725d443531e42368923c5
2022-05-06 13:45:22 +05:30
Venkatesh Yadav Abbarapu 16de22d037 fix(zynqmp): resolve misra R15.7 warnings
MISRA Violation: MISRA-C:2012 R.15.7
- All if . . else if constructs shall be terminated
with an else statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: If921ca7c30b2feea6535791aa15f4de7101c3134
2022-05-06 13:45:16 +05:30
Venkatesh Yadav Abbarapu eb0d2b1772 fix(zynqmp): resolve misra R15.6 warnings
MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
  a compound statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0fc8eeac0e592f00297a1ac42a1ba3df1144733b
2022-05-06 13:45:07 +05:30