andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
10,735 Commits 2 Branches 52 Tags 32 MiB
Commit Graph

3 Commits

Author SHA1 Message Date
Hadi Asyrafi 3dcb94dd84 intel: Enable bridge access in Intel platform 
Add bridge enablement features for each platform.
The bridge access will be enabled automatically for FPGA 1st
configuration only.

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I264757b257a209e1c3c4206660f21c5d67af0d2f
 2020-01-16 10:53:21 +08:00
Loh Tien Hock 51f366ac85 plat: intel: Fix faulty DDR calibration value 
A DDR calibration value is missing write mask, causing ECC DDR calibration
to fail. This patch addresses the issue. ECC should also be scrubbed before
MMU initializes, thus the scrubbing is moved to ddr intialization phase.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
 2019-02-13 14:39:31 +08:00
Loh Tien Hock 9d82ef26c6 plat: intel: Add BL2 support for Stratix 10 SoC 
This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
 2019-02-04 16:17:24 +08:00