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6 Commits

Author SHA1 Message Date
Muhammad Hadi Asyrafi Abdul Halim f5ba408c34 intel: QSPI boot enablement 
Manages QSPI initialization, configuration and IO handling as boot device

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
 2019-03-13 10:17:14 +08:00
Dimitris Papastamos 3c652a2d1c
Merge pull request #1863 from thloh85-intel/mmc_fixes 
drivers: mmc: Fix some issues with MMC stack
 2019-03-08 09:41:22 +00:00
Tien Hock, Loh dd8c03b6bf plat: intel: Add MMC OCR voltage information for initialization 
MMC stack needs OCR voltage information for the platform to initialize
MMC controller correctly.

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
 2019-03-08 09:26:24 +08:00
Muhammad Hadi Asyrafi Abdul Halim 5bd1b445a9 intel: Mailbox service un-accessible 
Change map region for device 2 from non-secure to secure

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
 2019-03-07 13:17:25 +08:00
Loh Tien Hock 51f366ac85 plat: intel: Fix faulty DDR calibration value 
A DDR calibration value is missing write mask, causing ECC DDR calibration
to fail. This patch addresses the issue. ECC should also be scrubbed before
MMU initializes, thus the scrubbing is moved to ddr intialization phase.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
 2019-02-13 14:39:31 +08:00
Loh Tien Hock 9d82ef26c6 plat: intel: Add BL2 support for Stratix 10 SoC 
This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
 2019-02-04 16:17:24 +08:00