This patch converts the 'target_cpu' and 'target_cluster' variables from
the tegra_soc_pwr_domain_on() handler to 32-bits. This fixes the signed
comparison warning flagged by the compiler.
Change-Id: Idfd7ad2a62749bb0dd032eb9eb5f4b28df32bba0
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This patch adds support for cpu suspend in T19x soc.
Change-Id: I8ef1d3e03ee9c528dec34eaff6dcbbfa43941484
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
- In pre-silicon platforms, MCE might not be ready
to support system suspend(SC7)
- Thus, in fake system suspend mode, bypass waiting for
MCE's acknowledgment to enter system suspend
Change-Id: Ia3c010ce080c4283ab1233ba82e3e577adca34f6
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
This patch does the following:
1. Populate the cstate info corresponding to system suspend
and communicate it to the MCE
2. Ask for MCE's acknowledgement for entering system suspend
and instruct MCE to get inside system suspend once
permitted
Change-Id: I51e1910e24a7e61e36ac2d12ce271290e433e506
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
This patch fixes the variable width to store the TZDRAM base
address used to resume from System Suspend.
Change-Id: I3c18eb844963f39f91b5ac45e3709f3354bcda0c
Signed-off-by: Steven Kao <skao@nvidia.com>
This patch creates the base commit for the Tegra194 platform, from
Tegra186 code base.
Change-Id: I1c77e4984f7ff39655f3fb79633d13d533707ede
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
Krishna Sitaraman
Vignesh Radhakrishnan
Tejal Kudav
Steven Kao