Commit Graph

14 Commits

Author SHA1 Message Date
dp-arm 82cb2c1ad9 Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-03 09:39:28 +01:00
Soren Brinkmann 46cb684f32 zynqmp: pm: Plumb get_chipid through FW interface
Use the PMUFW get_chipid call to obtain IDCODE and version register.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:48:48 -08:00
Soren Brinkmann e89f4af7dd zynqmp: Do not alter system counter
On ZynqMP the FSBL will configure the system counter. Hence, remove the
initialization of the system counter with hardcoded values from the ATF
and use the setup provided by the bootloader.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-11-16 15:48:48 -08:00
Soren Brinkmann 466675c23d zynqmp: Read silicon ID register only once
The silicon ID does not change at runtime. Skip the IO access if the
ID has been read before.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-11-16 15:48:48 -08:00
Siva Durga Prasad Paladugu 3104f2e78d zynqmp: Add support to provide silicon id through SMC
Add support to provide silicon id to non-secure
software through SMC.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

[ sb
Move zynqmp_get_silicon_id outside of compile guards to avoid build
errors.
]

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-09-13 09:19:03 -07:00
Soren Brinkmann e1cb4da465 zynqmp: Add support for generic_delay_timer
Initialize the generic_delay_timer in the zynqmp port.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-09-13 09:19:02 -07:00
danh-arm 50f7101a49 Merge pull request #650 from Xilinx/zynqmp-updates
Zynqmp updates
2016-06-15 15:57:02 +01:00
Soren Brinkmann 648fe99e9f zynqmp: Ignore the revision field of the IDCODE
The revision field may change between silicon revisions without changing
the mapping to a part. This avoids errors like:
  ERROR: Incorrect XILINX IDCODE 0x14738093, maskid 0x4600093
  NOTICE: ATF running on XCZUUNKN/EP108 v3/RTL5.1 at 0xfffe5000
on parts with a newer revision.

Reported-by: Love Kumar <love.kumar@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Tested-by: Love Kumar <love.kumar@xilinx.com>
2016-05-24 23:07:12 -07:00
Antonio Nino Diaz f3d3b316f8 Implement plat_get_syscnt_freq2 on platforms
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all
upstream platforms.

Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe
2016-05-20 15:29:30 +01:00
Soren Brinkmann 2cb5bac984 zynqmp: Introduce zynqmp_get_bootmode
Provide a function to retrieve the bootmode.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-04-25 09:49:59 -07:00
Soren Brinkmann e543e79b2d zynqmp: Remove bogus comment
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-04-25 09:49:58 -07:00
Yatharth Kochar c073fda1c6 Move `plat_get_syscnt_freq()` to arm_common.c
This patch moves the definition for `plat_get_syscnt_freq()`
from arm_bl31_setup.c to arm_common.c. This could be useful
in case a delay timer needs to be installed based on the
generic timer in other BLs.
This patch also modifies the return type for this function
from `uint64_t` to `unsigned long long` within ARM and other
platform files.

Change-Id: Iccdfa811948e660d4fdcaae60ad1d700e4eda80d
2016-04-21 17:10:58 +01:00
Soren Brinkmann 8b90140657 zynqmp: Remove unused/redundant #includes
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-04-18 07:33:15 -07:00
Soren Brinkmann c8284409e1 Add support for Xilinx Zynq UltraScale+ MPSOC
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-04-06 10:44:27 -07:00