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Author SHA1 Message Date
Dimitris Papastamos f06890ea89 Refactor AMU support for Cortex A75 
This patch also fixes the assumption that the counters are disabled on
the resume path.  This is incorrect as the AMU counters are enabled
early in the CPU reset function before `cpuamu_context_restore()`
runs.

Change-Id: I38a94eb166a523f00de18e86860434ffccff2131
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
 2018-02-27 13:28:41 +00:00
Dimitris Papastamos a2e702a2f3 Factor out CPU AMU helpers 
This patch also fixes `cpuamu_write_cpuamcntenclr_el0()` to use an MSR
instruction instead of an MRS instruction.

Change-Id: Ia6531f64b5ebc60ba432124eaa8d8eaccba40ed0
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
 2018-02-27 13:28:41 +00:00