Commit Graph

4 Commits

Author SHA1 Message Date
Achin Gupta 126747f7f3 Introduce interrupt registration framework in BL3-1
This patch introduces a framework for registering interrupts routed to
EL3. The interrupt routing model is governed by the SCR_EL3.IRQ and
FIQ bits and the security state an interrupt is generated in. The
framework recognizes three type of interrupts depending upon which
exception level and security state they should be handled in
i.e. Secure EL1 interrupts, Non-secure interrupts and EL3
interrupts. It provides an API and macros that allow a runtime service
to register an handler for a type of interrupt and specify the routing
model. The framework validates the routing model and uses the context
management framework to ensure that it is applied to the SCR_EL3 prior
to entry into the target security state. It saves the handler in
internal data structures. An API is provided to retrieve the handler
when an interrupt of a particular type is asserted. Registration is
expected to be done once by the primary CPU. The same handler and
routing model is used for all CPUs.

Support for EL3 interrupts will be added to the framework in the
future. A makefile flag has been added to allow the FVP port choose
between ARM GIC v2 and v3 support in EL3. The latter version is
currently unsupported.

A framework for handling interrupts in BL3-1 will be introduced in
subsequent patches. The default routing model in the absence of any
handlers expects no interrupts to be routed to EL3.

Change-Id: Idf7c023b34fcd4800a5980f2bef85e4b5c29e649
2014-05-19 13:10:49 +01:00
Juan Castillo 42a52d89e7 Fix C accessors to GIC distributor registers with set/clear semantics
This patch fixes C accessors to GIC registers that follow a set/clear
semantic to change the state of an interrupt, instead of read/write/modify.
These registers are:
  Set-Enable
  Clear-Enable
  Set-Pending
  Clear-Pending
  Set-Active
  Clear-Active
For instance, to enable an interrupt we write a one to the corresponding bit
in the Set-Enable register, whereas to disable it we write a one to the
corresponding bit in the Clear-Enable register.

Fixes ARM-software/tf-issues#137

Change-Id: I3b66bad94d0b28e0fe08c9042bac0bf5ffa07944
2014-05-13 11:51:08 +01:00
Dan Handley 8a4fb6f658 Refactor GIC header files
Move the function prototypes from gic.h into either gic_v2.h or
gic_v3.h as appropriate. Update the source files to include the
correct headers.

Change-Id: I368cfda175cdcbd3a68f46e2332738ec49048e19
2014-05-06 12:35:02 +01:00
Dan Handley 4ecca33988 Move include and source files to logical locations
Move almost all system include files to a logical sub-directory
under ./include. The only remaining system include directories
not under ./include are specific to the platform. Move the
corresponding source files to match the include directory
structure.

Also remove pm.h as it is no longer used.

Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
2014-05-06 12:35:02 +01:00