/* * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * Neither the name of ARM nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #ifndef __BOARD_ARM_DEF_H__ #define __BOARD_ARM_DEF_H__ #include /* * Required platform porting definitions common to all ARM * development platforms */ /* Size of cacheable stacks */ #if defined(IMAGE_BL1) #if TRUSTED_BOARD_BOOT # define PLATFORM_STACK_SIZE 0x1000 #else # define PLATFORM_STACK_SIZE 0x440 #endif #elif defined(IMAGE_BL2) # if TRUSTED_BOARD_BOOT # define PLATFORM_STACK_SIZE 0x1000 # else # define PLATFORM_STACK_SIZE 0x400 # endif #elif defined(IMAGE_BL2U) # define PLATFORM_STACK_SIZE 0x200 #elif defined(IMAGE_BL31) # define PLATFORM_STACK_SIZE 0x400 #elif defined(IMAGE_BL32) # define PLATFORM_STACK_SIZE 0x440 #endif /* * The constants below are not optimised for memory usage. Platforms that wish * to optimise these constants should set `ARM_BOARD_OPTIMISE_MEM` to 1 and * provide there own values. */ #if !ARM_BOARD_OPTIMISE_MEM /* * PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the * plat_arm_mmap array defined for each BL stage. * * Provide relatively optimised values for the runtime images (BL31 and BL32). * Optimisation is less important for the other, transient boot images so a * common, maximum value is used across these images. * * They are also used for the dynamically mapped regions in the images that * enable dynamic memory mapping. */ #if defined(IMAGE_BL31) || defined(IMAGE_BL32) # define PLAT_ARM_MMAP_ENTRIES 6 # define MAX_XLAT_TABLES 4 #else # define PLAT_ARM_MMAP_ENTRIES 10 # define MAX_XLAT_TABLES 5 #endif /* * PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size * plus a little space for growth. */ #define PLAT_ARM_MAX_BL1_RW_SIZE 0xA000 /* * PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a * little space for growth. */ #if TRUSTED_BOARD_BOOT # define PLAT_ARM_MAX_BL2_SIZE 0x1D000 #else # define PLAT_ARM_MAX_BL2_SIZE 0xF000 #endif /* * PLAT_ARM_MAX_BL31_SIZE is calculated using the current BL31 debug size plus a * little space for growth. */ #define PLAT_ARM_MAX_BL31_SIZE 0x1D000 #endif /* ARM_BOARD_OPTIMISE_MEM */ #define MAX_IO_DEVICES 3 #define MAX_IO_HANDLES 4 #define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */ #define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE #define PLAT_ARM_FIP_MAX_SIZE V2M_FLASH0_SIZE #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE #define PLAT_ARM_NVM_SIZE V2M_FLASH0_SIZE #endif /* __BOARD_ARM_DEF_H__ */