/* * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * Neither the name of ARM nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include #include .weak plat_arm_calc_core_pos .weak plat_my_core_pos .globl plat_crash_console_init .globl plat_crash_console_putc .globl plat_crash_console_flush .globl platform_mem_init /* ----------------------------------------------------- * unsigned int plat_my_core_pos(void) * This function uses the plat_arm_calc_core_pos() * definition to get the index of the calling CPU. * ----------------------------------------------------- */ func plat_my_core_pos mrs x0, mpidr_el1 b plat_arm_calc_core_pos endfunc plat_my_core_pos /* ----------------------------------------------------- * unsigned int plat_arm_calc_core_pos(u_register_t mpidr) * Helper function to calculate the core position. * With this function: CorePos = (ClusterId * 4) + * CoreId * ----------------------------------------------------- */ func plat_arm_calc_core_pos and x1, x0, #MPIDR_CPU_MASK and x0, x0, #MPIDR_CLUSTER_MASK add x0, x1, x0, LSR #6 ret endfunc plat_arm_calc_core_pos /* --------------------------------------------- * int plat_crash_console_init(void) * Function to initialize the crash console * without a C Runtime to print crash report. * Clobber list : x0 - x4 * --------------------------------------------- */ func plat_crash_console_init mov_imm x0, PLAT_ARM_CRASH_UART_BASE mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ mov_imm x2, ARM_CONSOLE_BAUDRATE b console_core_init endfunc plat_crash_console_init /* --------------------------------------------- * int plat_crash_console_putc(int c) * Function to print a character on the crash * console without a C Runtime. * Clobber list : x1, x2 * --------------------------------------------- */ func plat_crash_console_putc mov_imm x1, PLAT_ARM_CRASH_UART_BASE b console_core_putc endfunc plat_crash_console_putc /* --------------------------------------------- * int plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. * Out : return -1 on error else return 0. * Clobber list : r0 - r1 * --------------------------------------------- */ func plat_crash_console_flush mov_imm x1, PLAT_ARM_CRASH_UART_BASE b console_core_flush endfunc plat_crash_console_flush /* --------------------------------------------------------------------- * We don't need to carry out any memory initialization on ARM * platforms. The Secure RAM is accessible straight away. * --------------------------------------------------------------------- */ func platform_mem_init ret endfunc platform_mem_init