/* * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #ifndef __PLATFORM_DEF_H__ #define __PLATFORM_DEF_H__ #include #define CACHE_WRITEBACK_SHIFT 6 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) #define PLATFORM_STACK_SIZE 0x400 #define BL31_BASE 0x04000000 #define BL31_SIZE 0x00080000 #define BL31_LIMIT (BL31_BASE + BL31_SIZE) #endif /* __PLATFORM_DEF_H__ */