23 lines
692 B
C
23 lines
692 B
C
/*
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* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CORTEX_A32_H
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#define CORTEX_A32_H
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#include <lib/utils_def.h>
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/* Cortex-A32 Main ID register for revision 0 */
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#define CORTEX_A32_MIDR U(0x410FD010)
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/*******************************************************************************
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* CPU Extended Control register specific definitions.
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* CPUECTLR_EL1 is an implementation-specific register.
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******************************************************************************/
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#define CORTEX_A32_CPUECTLR_EL1 p15, 1, c15
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#define CORTEX_A32_CPUECTLR_SMPEN_BIT (ULL(1) << 6)
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#endif /* CORTEX_A32_H */
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