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arm-trusted-firmware/plat/allwinner/sun50i_h616/include
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Icenowy Zheng 080939f924 refactor(plat/allwinner): allow new AA64nAA32 position 
In newer Allwiner SoCs, the AA64nAA32 wires are mapped to a new register
called "General Control Register0" in the manual rather than the
"Cluster 0 Control Register0" in older SoCs.

Now the position of AA64nAA32 (reg and bit offset) is defined in a few
macros instead assumed to be at bit offset 24 of
SUNXI_CPUCFG_CLS_CTRL_REG0.

Change-Id: I933d00b9a914bf7103e3a9dadbc6d7be1a409668
Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
 		2021-08-25 00:33:59 +08:00
..
sunxi_ccu.h allwinner: Add Allwinner H616 SoC support 2021-03-25 15:25:54 +00:00
sunxi_cpucfg.h refactor(plat/allwinner): allow new AA64nAA32 position 2021-08-25 00:33:59 +08:00
sunxi_mmap.h allwinner: Add Allwinner H616 SoC support 2021-03-25 15:25:54 +00:00
sunxi_spc.h allwinner: Add Allwinner H616 SoC support 2021-03-25 15:25:54 +00:00