66 lines
1.4 KiB
C
66 lines
1.4 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018,2020, The Linux Foundation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <stdint.h>
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#include <arch_helpers.h>
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#include <bl31/interrupt_mgmt.h>
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#include <drivers/arm/gic_common.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include <platform.h>
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#include <qti_interrupt_svc.h>
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#include <qtiseclib_interface.h>
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#define QTI_INTR_INVALID_INT_NUM 0xFFFFFFFFU
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/*
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* Top-level EL3 interrupt handler.
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*/
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static uint64_t qti_el3_interrupt_handler(uint32_t id, uint32_t flags,
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void *handle, void *cookie)
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{
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uint32_t irq = QTI_INTR_INVALID_INT_NUM;
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/*
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* EL3 non-interruptible. Interrupt shouldn't occur when we are at
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* EL3 / Secure.
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*/
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assert(handle != cm_get_context(SECURE));
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irq = plat_ic_acknowledge_interrupt();
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qtiseclib_invoke_isr(irq, handle);
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/* End of Interrupt. */
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if (irq < 1022U) {
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plat_ic_end_of_interrupt(irq);
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}
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return (uint64_t) handle;
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}
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int qti_interrupt_svc_init(void)
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{
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int ret;
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uint64_t flags = 0U;
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/*
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* Route EL3 interrupts to EL3 when in Non-secure.
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* Note: EL3 won't have interrupt enable
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* & we don't have S-EL1 support.
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*/
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set_interrupt_rm_flag(flags, NON_SECURE);
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/* Register handler for EL3 interrupts */
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ret = register_interrupt_type_handler(INTR_TYPE_EL3,
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qti_el3_interrupt_handler, flags);
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assert(ret == 0);
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return ret;
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}
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