37 lines
924 B
C
37 lines
924 B
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __PLATFORM_DEF_H__
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#define __PLATFORM_DEF_H__
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#include <common_def.h>
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/* CPU topology */
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#define PLAT_MAX_CORES_PER_CLUSTER 2
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#define PLAT_CLUSTER_COUNT 12
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#define PLATFORM_CORE_COUNT (PLAT_CLUSTER_COUNT * \
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PLAT_MAX_CORES_PER_CLUSTER)
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#define CACHE_WRITEBACK_SHIFT 6
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#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT)
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#define PLATFORM_STACK_SIZE 0x400
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#define BL31_BASE 0x04000000
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#define BL31_SIZE 0x00080000
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#define BL31_LIMIT (BL31_BASE + BL31_SIZE)
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/* UART related constants */
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#define PLAT_SQ_BOOT_UART_BASE 0x2A400000
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#define PLAT_SQ_BOOT_UART_CLK_IN_HZ 62500000
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#define SQ_CONSOLE_BAUDRATE 115200
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#define SQ_BOOT_CFG_ADDR 0x45410000
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#define PLAT_SQ_PRIMARY_CPU_SHIFT 8
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#define PLAT_SQ_PRIMARY_CPU_BIT_WIDTH 6
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#endif /* __PLATFORM_DEF_H__ */
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