29 lines
888 B
C
29 lines
888 B
C
/*
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* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FVP_R_ARCH_HELPERS_H
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#define FVP_R_ARCH_HELPERS_H
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#include <arch_helpers.h>
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/*******************************************************************************
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* MPU register definitions
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******************************************************************************/
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#define MPUIR_EL2 S3_4_C0_C0_4
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#define PRBAR_EL2 S3_4_C6_C8_0
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#define PRLAR_EL2 S3_4_C6_C8_1
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#define PRSELR_EL2 S3_4_C6_C2_1
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#define PRENR_EL2 S3_4_C6_C1_1
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/* v8-R64 MPU registers */
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DEFINE_RENAME_SYSREG_RW_FUNCS(mpuir_el2, MPUIR_EL2)
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DEFINE_RENAME_SYSREG_RW_FUNCS(prenr_el2, PRENR_EL2)
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DEFINE_RENAME_SYSREG_RW_FUNCS(prselr_el2, PRSELR_EL2)
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DEFINE_RENAME_SYSREG_RW_FUNCS(prbar_el2, PRBAR_EL2)
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DEFINE_RENAME_SYSREG_RW_FUNCS(prlar_el2, PRLAR_EL2)
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#endif /* FVP_R_ARCH_HELPERS_H */
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