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Bipin Ravi 5f802c8832 fix(security): workaround for CVE-2022-23960 for A76AE, A78AE, A78C 
Implements the loop workaround for Cortex-A76AE, Cortex-A78AE and
Cortex-A78C.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Change-Id: I5c838f5b9d595ed3c461a7452bd465bd54acc548
 		2022-03-21 08:57:09 -05:00
..
aarch32 Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ 2019-08-01 13:14:12 -07:00
aarch64 fix(security): workaround for CVE-2022-23960 for A76AE, A78AE, A78C 2022-03-21 08:57:09 -05:00
errata_report.h Workaround for Cortex A78 erratum 1951500 2021-01-13 13:54:18 -06:00
wa_cve_2017_5715.h Fix MISRA defects in workaround and errata framework 2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h Fix MISRA defects in workaround and errata framework 2018-10-29 14:41:48 +00:00
wa_cve_2022_23960.h fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00