This patch adds support for all three SMMU devices present on the SoC. The following changes have been done: Add SMMU devices to the memory map Update register read and write functions Change-Id: I0007b496d2ae7264f4fa9f605d4b0a15fa747a0f Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> |
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tegra |