Upstream fork of ATF with a couple of rk3399 patches to remove HDCP blob and increase BAUD_RATE.
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Pali Rohár 0ee80f35a2 fix(plat/marvell/a3720/uart): do external reset during initialization
Sometimes when changing UART clock from TBG to XTAL, UART HW enters into
some broken state. It does not transit characters from TX FIFO anymore
and TX FIFO stays always empty. TX FIFO reset does not recover UART HW
from this broken state.

Experiments show that external reset can fix UART HW from this broken
state.

TF-A fatal error handler calls console_a3700_core_init() function to
initialize UART HW. This handler may be called anytime during CPU
runtime, also when kernel is running.

U-Boot or Linux kernel may change UART clock to TBG to achieve higher
baudrates. During initialization, console_a3700_core_init() resets UART
configuration to default settings, which means that it also changes
UART clock from TBG to XTAL.

Do an external reset of UART via North Bridge Peripheral reset register
to prevent this UART hangup.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I8990bce24d1a6fd8ccc47a2cd0a5ff932fcfcf14
2021-12-02 17:38:02 +01:00
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bl2 feat(measured boot): move init and teardown functions to platform layer 2021-10-12 17:53:47 +01:00
bl2u Avoid the use of linker *_SIZE__ macros 2021-04-21 15:05:57 +02:00
bl31 feat(sme): enable SME functionality 2021-11-12 10:38:00 -06:00
bl32 fix: use correct printf format for uint64_t 2021-11-12 13:02:02 +00:00
common Merge "fix: libc: use long for 64-bit types on aarch64" into integration 2021-11-08 21:34:42 +01:00
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drivers fix(plat/marvell/a3720/uart): do external reset during initialization 2021-12-02 17:38:02 +01:00
fdts Merge "fix(arm_fpga): Change PL011 UART IRQ" into integration 2021-11-08 16:52:43 +01:00
include fix(plat/marvell/a3720/uart): do external reset during initialization 2021-12-02 17:38:02 +01:00
lib fix(pie): align fixup_gdt_reloc() for aarch64 2021-12-01 17:35:33 +01:00
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make_helpers feat(sme): enable SME functionality 2021-11-12 10:38:00 -06:00
plat feat(plat/marvell/a3k): add north and south bridge reset registers 2021-12-02 17:37:58 +01:00
services fix(rmmd): preserve x4-x7 as per SMCCCv1.1 2021-11-24 19:26:51 +02:00
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readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

readme.rst

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Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.


Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.

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