70 lines
1.9 KiB
Makefile
70 lines
1.9 KiB
Makefile
#
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# Copyright (c) 2020, Arm Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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MORELLO_BASE := plat/arm/board/morello
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INTERCONNECT_SOURCES := ${MORELLO_BASE}/morello_interconnect.c
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PLAT_INCLUDES := -I${MORELLO_BASE}/include
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MORELLO_CPU_SOURCES := lib/cpus/aarch64/rainier.S
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# GIC-600 configuration
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GICV3_SUPPORT_GIC600 := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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MORELLO_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c \
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PLAT_BL_COMMON_SOURCES := ${MORELLO_BASE}/morello_plat.c \
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${MORELLO_BASE}/aarch64/morello_helper.S
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BL31_SOURCES := ${MORELLO_CPU_SOURCES} \
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${INTERCONNECT_SOURCES} \
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${MORELLO_GIC_SOURCES} \
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${MORELLO_BASE}/morello_bl31_setup.c \
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${MORELLO_BASE}/morello_topology.c \
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${MORELLO_BASE}/morello_security.c \
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drivers/arm/css/sds/sds.c
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FDT_SOURCES += fdts/morello-fvp.dts
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# TF-A not required to load the SCP Images
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override CSS_LOAD_SCP_IMAGES := 0
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# BL1/BL2 Image not a part of the capsule Image for morello
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override NEED_BL1 := no
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override NEED_BL2 := no
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override NEED_BL2U := no
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#TF-A for morello starts from BL31
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override RESET_TO_BL31 := 1
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# 32 bit mode not supported
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override CTX_INCLUDE_AARCH32_REGS := 0
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override ARM_PLAT_MT := 1
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# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
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# SCP during power management operations and for SCP RAM Firmware transfer.
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CSS_USE_SCMI_SDS_DRIVER := 1
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# System coherency is managed in hardware
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HW_ASSISTED_COHERENCY := 1
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# When building for systems with hardware-assisted coherency, there's no need to
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# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
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USE_COHERENT_MEM := 0
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include plat/arm/common/arm_common.mk
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include plat/arm/css/common/css_common.mk
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include plat/arm/board/common/board_common.mk
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override ERRATA_N1_1542419 := 1
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