346 lines
7.7 KiB
C
346 lines
7.7 KiB
C
/*
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <bpmp_ipc.h>
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#include <common/debug.h>
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#include <drivers/delay_timer.h>
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#include <errno.h>
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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#include <stdbool.h>
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#include <string.h>
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#include <tegra_def.h>
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#include "intf.h"
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#include "ivc.h"
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/**
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* Holds IVC channel data
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*/
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struct ccplex_bpmp_channel_data {
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/* Buffer for incoming data */
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struct frame_data *ib;
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/* Buffer for outgoing data */
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struct frame_data *ob;
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};
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static struct ccplex_bpmp_channel_data s_channel;
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static struct ivc ivc_ccplex_bpmp_channel;
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/*
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* Helper functions to access the HSP doorbell registers
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*/
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static inline uint32_t hsp_db_read(uint32_t reg)
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{
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return mmio_read_32((uint32_t)(TEGRA_HSP_DBELL_BASE + reg));
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}
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static inline void hsp_db_write(uint32_t reg, uint32_t val)
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{
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mmio_write_32((uint32_t)(TEGRA_HSP_DBELL_BASE + reg), val);
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}
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/*******************************************************************************
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* IVC wrappers for CCPLEX <-> BPMP communication.
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******************************************************************************/
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static void tegra_bpmp_ring_bpmp_doorbell(void);
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/*
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* Get the next frame where data can be written.
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*/
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static struct frame_data *tegra_bpmp_get_next_out_frame(void)
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{
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struct frame_data *frame;
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const struct ivc *ch = &ivc_ccplex_bpmp_channel;
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frame = (struct frame_data *)tegra_ivc_write_get_next_frame(ch);
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if (frame == NULL) {
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ERROR("%s: Error in getting next frame, exiting\n", __func__);
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} else {
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s_channel.ob = frame;
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}
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return frame;
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}
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static void tegra_bpmp_signal_slave(void)
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{
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(void)tegra_ivc_write_advance(&ivc_ccplex_bpmp_channel);
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tegra_bpmp_ring_bpmp_doorbell();
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}
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static int32_t tegra_bpmp_free_master(void)
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{
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return tegra_ivc_read_advance(&ivc_ccplex_bpmp_channel);
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}
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static bool tegra_bpmp_slave_acked(void)
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{
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struct frame_data *frame;
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bool ret = true;
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frame = (struct frame_data *)tegra_ivc_read_get_next_frame(&ivc_ccplex_bpmp_channel);
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if (frame == NULL) {
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ret = false;
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} else {
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s_channel.ib = frame;
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}
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return ret;
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}
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static struct frame_data *tegra_bpmp_get_cur_in_frame(void)
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{
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return s_channel.ib;
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}
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/*
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* Enables BPMP to ring CCPlex doorbell
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*/
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static void tegra_bpmp_enable_ccplex_doorbell(void)
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{
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uint32_t reg;
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reg = hsp_db_read(HSP_DBELL_1_ENABLE);
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reg |= HSP_MASTER_BPMP_BIT;
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hsp_db_write(HSP_DBELL_1_ENABLE, reg);
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}
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/*
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* CCPlex rings the BPMP doorbell
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*/
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static void tegra_bpmp_ring_bpmp_doorbell(void)
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{
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/*
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* Any writes to this register has the same effect,
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* uses master ID of the write transaction and set
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* corresponding flag.
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*/
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hsp_db_write(HSP_DBELL_3_TRIGGER, HSP_MASTER_CCPLEX_BIT);
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}
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/*
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* Returns true if CCPLex can ring BPMP doorbell, otherwise false.
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* This also signals that BPMP is up and ready.
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*/
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static bool tegra_bpmp_can_ccplex_ring_doorbell(void)
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{
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uint32_t reg;
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/* check if ccplex can communicate with bpmp */
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reg = hsp_db_read(HSP_DBELL_3_ENABLE);
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return ((reg & HSP_MASTER_CCPLEX_BIT) != 0U);
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}
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static int32_t tegra_bpmp_wait_for_slave_ack(void)
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{
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uint32_t timeout = TIMEOUT_RESPONSE_FROM_BPMP_US;
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while (!tegra_bpmp_slave_acked() && (timeout != 0U)) {
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udelay(1);
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timeout--;
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};
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return ((timeout == 0U) ? -ETIMEDOUT : 0);
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}
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/*
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* Notification from the ivc layer
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*/
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static void tegra_bpmp_ivc_notify(const struct ivc *ivc)
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{
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(void)(ivc);
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tegra_bpmp_ring_bpmp_doorbell();
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}
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/*
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* Atomic send/receive API, which means it waits until slave acks
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*/
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static int32_t tegra_bpmp_ipc_send_req_atomic(uint32_t mrq, void *p_out,
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uint32_t size_out, void *p_in, uint32_t size_in)
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{
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struct frame_data *frame = tegra_bpmp_get_next_out_frame();
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const struct frame_data *f_in = NULL;
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int32_t ret = 0;
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void *p_fdata;
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if ((p_out == NULL) || (size_out > IVC_DATA_SZ_BYTES) ||
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(frame == NULL)) {
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ERROR("%s: invalid parameters, exiting\n", __func__);
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return -EINVAL;
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}
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/* prepare the command frame */
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frame->mrq = mrq;
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frame->flags = FLAG_DO_ACK;
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p_fdata = frame->data;
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(void)memcpy(p_fdata, p_out, (size_t)size_out);
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/* signal the slave */
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tegra_bpmp_signal_slave();
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/* wait for slave to ack */
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ret = tegra_bpmp_wait_for_slave_ack();
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if (ret < 0) {
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ERROR("%s: wait for slave failed (%d)\n", __func__, ret);
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return ret;
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}
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/* retrieve the response frame */
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if ((size_in <= IVC_DATA_SZ_BYTES) && (p_in != NULL)) {
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f_in = tegra_bpmp_get_cur_in_frame();
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if (f_in != NULL) {
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ERROR("Failed to get next input frame!\n");
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} else {
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(void)memcpy(p_in, p_fdata, (size_t)size_in);
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}
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}
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ret = tegra_bpmp_free_master();
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if (ret < 0) {
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ERROR("%s: free master failed (%d)\n", __func__, ret);
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}
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return ret;
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}
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/*
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* Initializes the BPMP<--->CCPlex communication path.
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*/
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int32_t tegra_bpmp_ipc_init(void)
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{
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size_t msg_size;
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uint32_t frame_size, timeout;
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int32_t error = 0;
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/* allow bpmp to ring CCPLEX's doorbell */
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tegra_bpmp_enable_ccplex_doorbell();
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/* wait for BPMP to actually ring the doorbell */
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timeout = TIMEOUT_RESPONSE_FROM_BPMP_US;
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while ((timeout != 0U) && !tegra_bpmp_can_ccplex_ring_doorbell()) {
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udelay(1); /* bpmp turn-around time */
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timeout--;
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}
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if (timeout == 0U) {
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ERROR("%s: BPMP firmware is not ready\n", __func__);
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return -ENOTSUP;
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}
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INFO("%s: BPMP handshake completed\n", __func__);
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msg_size = tegra_ivc_align(IVC_CMD_SZ_BYTES);
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frame_size = (uint32_t)tegra_ivc_total_queue_size(msg_size);
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if (frame_size > TEGRA_BPMP_IPC_CH_MAP_SIZE) {
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ERROR("%s: carveout size is not sufficient\n", __func__);
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return -EINVAL;
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}
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error = tegra_ivc_init(&ivc_ccplex_bpmp_channel,
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(uint32_t)TEGRA_BPMP_IPC_RX_PHYS_BASE,
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(uint32_t)TEGRA_BPMP_IPC_TX_PHYS_BASE,
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1U, frame_size, tegra_bpmp_ivc_notify);
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if (error != 0) {
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ERROR("%s: IVC init failed (%d)\n", __func__, error);
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} else {
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/* reset channel */
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tegra_ivc_channel_reset(&ivc_ccplex_bpmp_channel);
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/* wait for notification from BPMP */
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while (tegra_ivc_channel_notified(&ivc_ccplex_bpmp_channel) != 0) {
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/*
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* Interrupt BPMP with doorbell each time after
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* tegra_ivc_channel_notified() returns non zero
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* value.
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*/
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tegra_bpmp_ring_bpmp_doorbell();
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}
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INFO("%s: All communication channels initialized\n", __func__);
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}
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return error;
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}
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/* Handler to reset a hardware module */
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int32_t tegra_bpmp_ipc_reset_module(uint32_t rst_id)
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{
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int32_t ret;
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struct mrq_reset_request req = {
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.cmd = (uint32_t)CMD_RESET_MODULE,
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.reset_id = rst_id
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};
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/* only GPCDMA/XUSB_PADCTL resets are supported */
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assert((rst_id == TEGRA_RESET_ID_XUSB_PADCTL) ||
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(rst_id == TEGRA_RESET_ID_GPCDMA));
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ret = tegra_bpmp_ipc_send_req_atomic(MRQ_RESET, &req,
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(uint32_t)sizeof(req), NULL, 0);
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if (ret != 0) {
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ERROR("%s: failed for module %d with error %d\n", __func__,
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rst_id, ret);
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}
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return ret;
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}
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int tegra_bpmp_ipc_enable_clock(uint32_t clk_id)
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{
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int ret;
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struct mrq_clk_request req;
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/* only SE clocks are supported */
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if (clk_id != TEGRA_CLK_SE) {
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return -ENOTSUP;
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}
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/* prepare the MRQ_CLK command */
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req.cmd_and_id = make_mrq_clk_cmd(CMD_CLK_ENABLE, clk_id);
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ret = tegra_bpmp_ipc_send_req_atomic(MRQ_CLK, &req, (uint32_t)sizeof(req),
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NULL, 0);
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if (ret != 0) {
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ERROR("%s: failed for module %d with error %d\n", __func__,
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clk_id, ret);
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}
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return ret;
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}
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int tegra_bpmp_ipc_disable_clock(uint32_t clk_id)
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{
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int ret;
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struct mrq_clk_request req;
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/* only SE clocks are supported */
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if (clk_id != TEGRA_CLK_SE) {
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return -ENOTSUP;
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}
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/* prepare the MRQ_CLK command */
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req.cmd_and_id = make_mrq_clk_cmd(CMD_CLK_DISABLE, clk_id);
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ret = tegra_bpmp_ipc_send_req_atomic(MRQ_CLK, &req, (uint32_t)sizeof(req),
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NULL, 0);
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if (ret != 0) {
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ERROR("%s: failed for module %d with error %d\n", __func__,
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clk_id, ret);
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}
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return ret;
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}
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