Jiafei Pan 8bbb1d80a5 feat(cpu/cortex_a53): add L1PCTL macro definiton for CPUACTLR_EL1 ... Add L1PCTL field definiton in register CPUACTLR_EL1. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: Iebfb240ac58aa8f3dc870804bf4390dfbdfa9b95		2022-01-13 18:00:46 +08:00
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aarch32	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
aarch64	feat(cpu/cortex_a53): add L1PCTL macro definiton for CPUACTLR_EL1	2022-01-13 18:00:46 +08:00
errata_report.h	Workaround for Cortex A78 erratum 1951500	2021-01-13 13:54:18 -06:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00