Anthony Zhou 1d49112b2a Tegra: sip_calls: fix defects flagged by MISRA scan ... Main fixes: * Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses [Rule 20.7] * Added explicit casts (e.g. 0U) to integers in order for them to be compatible with whatever operation they're used in [Rule 10.1] * Fix implicit widening of composite assignment [Rule 10.6] Change-Id: Ia83c3ab6e4c8c03c19c950978a7936ebfc290590 Signed-off-by: Anthony Zhou <anzhou@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2019-01-16 10:11:06 -08:00
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aarch64	Tegra: support to set the L2 ECC and Parity enable bit	2019-01-16 10:10:52 -08:00
drivers	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
tegra_bl31_setup.c	Tegra: support to set the L2 ECC and Parity enable bit	2019-01-16 10:10:52 -08:00
tegra_common.mk	Tegra: support for native GICv2 drivers	2018-12-18 14:25:27 -08:00
tegra_delay_timer.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
tegra_fiq_glue.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
tegra_gicv2.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
tegra_platform.c	Tegra: platform: helper functions to read chip ID	2019-01-16 10:08:32 -08:00
tegra_pm.c	Tegra: console clock settings for real/FPGA platforms	2019-01-16 10:08:53 -08:00
tegra_sip_calls.c	Tegra: sip_calls: fix defects flagged by MISRA scan	2019-01-16 10:11:06 -08:00
tegra_topology.c	Tegra: retrieve power domain tree from the platforms	2019-01-16 10:08:08 -08:00