73 lines
3.1 KiB
C
73 lines
3.1 KiB
C
/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <plat_arm.h>
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/*
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* On ARM CSS platforms, by default, the system power level is treated as the
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* highest. The first entry in the power domain descriptor specifies the
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* number of system power domains i.e. 1.
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*/
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#define CSS_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT
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/*
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* The CSS power domain tree descriptor for dual cluster CSS platforms.
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* The cluster power domains are arranged so that when the PSCI generic
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* code creates the power domain tree, the indices of the CPU power
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* domain nodes it allocates match the linear indices returned by
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* plat_core_pos_by_mpidr() i.e. CLUSTER1 CPUs are allocated indices
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* from 0 to 3 and the higher indices for CLUSTER0 CPUs.
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*/
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const unsigned char arm_power_domain_tree_desc[] = {
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/* No of root nodes */
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CSS_PWR_DOMAINS_AT_MAX_PWR_LVL,
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/* No of children for the root node */
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ARM_CLUSTER_COUNT,
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/* No of children for the first cluster node */
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PLAT_ARM_CLUSTER1_CORE_COUNT,
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/* No of children for the second cluster node */
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PLAT_ARM_CLUSTER0_CORE_COUNT
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};
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/******************************************************************************
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* This function implements a part of the critical interface between the psci
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* generic layer and the platform that allows the former to query the platform
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* to convert an MPIDR to a unique linear index. An error code (-1) is
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* returned in case the MPIDR is invalid.
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*****************************************************************************/
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int plat_core_pos_by_mpidr(u_register_t mpidr)
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{
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if (arm_check_mpidr(mpidr) == 0)
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return plat_arm_calc_core_pos(mpidr);
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return -1;
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}
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