Manoj Kumar 2d39b39704 feat(morello): zero out the DDR memory space ... For Morello SoC, we use ECC capability for the RDIMMs which require the entire DDR memory space to be zeroed out before it can be accessed. Change-Id: Icbe9916f9a2d3c4ce839d8bf7f867efa18f33e23 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>		2021-12-15 11:50:29 +05:30
..
board	feat(morello): zero out the DDR memory space	2021-12-15 11:50:29 +05:30
common	fix(arm): use PLAT instead of TARGET_PLATFORM	2021-12-15 11:49:21 +05:30
css	fix(plat/arm/sgi): disable SVE for NS to support SPM_MM builds	2021-12-02 08:27:51 +01:00
soc/common	plat/arm: Sanitise includes	2019-01-25 16:04:10 +00:00