41 lines
857 B
C
41 lines
857 B
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <amu.h>
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#include <arch.h>
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#include <arch_helpers.h>
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void amu_enable(int el2_unused)
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{
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uint64_t features;
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features = read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT;
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if ((features & ID_AA64PFR0_AMU_MASK) == 1) {
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uint64_t v;
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if (el2_unused) {
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/*
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* CPTR_EL2.TAM: Set to zero so any accesses to
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* the Activity Monitor registers do not trap to EL2.
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*/
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v = read_cptr_el2();
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v &= ~CPTR_EL2_TAM_BIT;
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write_cptr_el2(v);
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}
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/*
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* CPTR_EL3.TAM: Set to zero so that any accesses to
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* the Activity Monitor registers do not trap to EL3.
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*/
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v = read_cptr_el3();
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v &= ~TAM_BIT;
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write_cptr_el3(v);
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/* Enable group 0 counters */
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write_amcntenset0_el0(AMU_GROUP0_COUNTERS_MASK);
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}
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}
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