Javier Almansa Sobrino 0063dd1708 Add support for FEAT_MTPMU for Armv8.6 ... If FEAT_PMUv3 is implemented and PMEVTYPER<n>(_EL0).MT bit is implemented as well, it is possible to control whether PMU counters take into account events happening on other threads. If FEAT_MTPMU is implemented, EL3 (or EL2) can override the MT bit leaving it to effective state of 0 regardless of any write to it. This patch introduces the DISABLE_MTPMU flag, which allows to diable multithread event count from EL3 (or EL2). The flag is disabled by default so the behavior is consistent with those architectures that do not implement FEAT_MTPMU. Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: Iee3a8470ae8ba13316af1bd40c8d4aa86e0cb85e		2020-12-11 12:49:20 +00:00
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aarch32	Fix MISRA C issues in BL1/BL2/BL31	2020-04-03 16:20:59 -05:00
aarch64	Increase type widths to satisfy width requirements	2020-10-12 10:55:03 -05:00
tbbr	Coverity: remove unnecessary header file includes	2020-02-04 10:23:51 -06:00
bl1.ld.S	linker_script: move .data section to bl_common.ld.h	2020-04-25 20:09:08 +09:00
bl1.mk	Add support for FEAT_MTPMU for Armv8.6	2020-12-11 12:49:20 +00:00
bl1_fwu.c	Fix MISRA C issues in BL1/BL2/BL31	2020-04-03 16:20:59 -05:00
bl1_main.c	Move static vars into functions in bl1	2020-08-31 11:11:48 -05:00
bl1_private.h	coverity: fix MISRA violations	2020-02-18 10:47:46 -06:00