144 lines
3.8 KiB
C
144 lines
3.8 KiB
C
/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <common/desc_image_load.h>
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#include <drivers/arm/css/sds.h>
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#include <libfdt.h>
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#include <plat/common/platform.h>
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#include "n1sdp_def.h"
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#include <plat/arm/common/plat_arm.h>
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/*
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* Platform information structure stored in SDS.
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* This structure holds information about platform's DDR
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* size which will be used to zero out the memory before
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* enabling the ECC capability as well as information
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* about multichip setup
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* - multichip mode
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* - secondary_count
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* - Local DDR size in GB, DDR memory in master board
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* - Remote DDR size in GB, DDR memory in secondary board
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*/
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struct n1sdp_plat_info {
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bool multichip_mode;
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uint8_t secondary_count;
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uint8_t local_ddr_size;
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uint8_t remote_ddr_size;
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} __packed;
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/*******************************************************************************
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* This function inserts Platform information via device tree nodes as,
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* platform-info {
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* multichip-mode = <0x0>;
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* secondary-chip-count = <0x0>;
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* local-ddr-size = <0x0>;
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* remote-ddr-size = <0x0>;
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* };
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******************************************************************************/
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static int plat_n1sdp_append_config_node(struct n1sdp_plat_info *plat_info)
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{
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bl_mem_params_node_t *mem_params;
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void *fdt;
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int nodeoffset, err;
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mem_params = get_bl_mem_params_node(NT_FW_CONFIG_ID);
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if (mem_params == NULL) {
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ERROR("NT_FW CONFIG base address is NULL\n");
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return -1;
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}
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fdt = (void *)(mem_params->image_info.image_base);
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/* Check the validity of the fdt */
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if (fdt_check_header(fdt) != 0) {
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ERROR("Invalid NT_FW_CONFIG DTB passed\n");
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return -1;
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}
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nodeoffset = fdt_subnode_offset(fdt, 0, "platform-info");
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if (nodeoffset < 0) {
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ERROR("NT_FW_CONFIG: Failed to get platform-info node offset\n");
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return -1;
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}
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err = fdt_setprop_u32(fdt, nodeoffset, "multichip-mode",
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plat_info->multichip_mode);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set multichip-mode\n");
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return -1;
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}
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err = fdt_setprop_u32(fdt, nodeoffset, "secondary-chip-count",
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plat_info->secondary_count);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set secondary-chip-count\n");
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return -1;
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}
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err = fdt_setprop_u32(fdt, nodeoffset, "local-ddr-size",
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plat_info->local_ddr_size);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set local-ddr-size\n");
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return -1;
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}
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err = fdt_setprop_u32(fdt, nodeoffset, "remote-ddr-size",
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plat_info->remote_ddr_size);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set remote-ddr-size\n");
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return -1;
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}
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flush_dcache_range((uintptr_t)fdt, mem_params->image_info.image_size);
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return 0;
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}
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/*******************************************************************************
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* This function returns the list of executable images.
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******************************************************************************/
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bl_params_t *plat_get_next_bl_params(void)
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{
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int ret;
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struct n1sdp_plat_info plat_info;
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ret = sds_init();
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if (ret != SDS_OK) {
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ERROR("SDS initialization failed. ret:%d\n", ret);
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panic();
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}
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ret = sds_struct_read(N1SDP_SDS_PLATFORM_INFO_STRUCT_ID,
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N1SDP_SDS_PLATFORM_INFO_OFFSET,
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&plat_info,
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N1SDP_SDS_PLATFORM_INFO_SIZE,
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SDS_ACCESS_MODE_NON_CACHED);
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if (ret != SDS_OK) {
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ERROR("Error getting platform info from SDS. ret:%d\n", ret);
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panic();
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}
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/* Validate plat_info SDS */
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if ((plat_info.local_ddr_size == 0U)
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|| (plat_info.local_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB)
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|| (plat_info.remote_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB)
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|| (plat_info.secondary_count > N1SDP_MAX_SECONDARY_COUNT)
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){
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ERROR("platform info SDS is corrupted\n");
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panic();
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}
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ret = plat_n1sdp_append_config_node(&plat_info);
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if (ret != 0) {
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panic();
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}
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return arm_get_next_bl_params();
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}
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