Louis Mayencourt 632ab3eb26 Neoverse N1: Forces cacheable atomic to near ... This patch forces all cacheable atomic instructions to be near, which improves performance in highly contended parallelized use-cases. Change-Id: I93fac62847f4af8d5eaaf3b52318c30893e947d3 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>		2019-04-18 14:55:46 +01:00
..
aarch32	cpus: Fix Cortex-A12 MIDR mask	2019-04-08 12:47:48 +02:00
aarch64	Neoverse N1: Forces cacheable atomic to near	2019-04-18 14:55:46 +01:00
errata_report.h	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00