140 lines
3.5 KiB
C
140 lines
3.5 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <string.h>
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#include <platform_def.h>
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#include <lib/mmio.h>
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#include <plat/common/platform.h>
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#include "gxbb_private.h"
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#define SIZE_SHIFT 20
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#define SIZE_MASK 0x1FF
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/*
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* Note: The Amlogic SCP firmware uses the legacy SCPI protocol.
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*/
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#define SCPI_CMD_SET_CSS_POWER_STATE 0x04
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#define SCPI_CMD_SET_SYS_POWER_STATE 0x08
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#define SCPI_CMD_JTAG_SET_STATE 0xC0
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#define SCPI_CMD_EFUSE_READ 0xC2
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static inline uint32_t scpi_cmd(uint32_t command, uint32_t size)
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{
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return command | (size << SIZE_SHIFT);
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}
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void scpi_secure_message_send(uint32_t command, uint32_t size)
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{
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mhu_secure_message_send(scpi_cmd(command, size));
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}
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uint32_t scpi_secure_message_receive(void **message_out, size_t *size_out)
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{
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uint32_t response = mhu_secure_message_wait();
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size_t size = (response >> SIZE_SHIFT) & SIZE_MASK;
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response &= ~(SIZE_MASK << SIZE_SHIFT);
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if (size_out != NULL)
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*size_out = size;
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if (message_out != NULL)
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*message_out = (void *)GXBB_MHU_SECURE_SCP_TO_AP_PAYLOAD;
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return response;
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}
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void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
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uint32_t cluster_state, uint32_t css_state)
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{
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uint32_t state = (mpidr & 0x0F) | /* CPU ID */
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((mpidr & 0xF00) >> 4) | /* Cluster ID */
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(cpu_state << 8) |
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(cluster_state << 12) |
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(css_state << 16);
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mhu_secure_message_start();
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, state);
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mhu_secure_message_send(scpi_cmd(SCPI_CMD_SET_CSS_POWER_STATE, 4));
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mhu_secure_message_wait();
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mhu_secure_message_end();
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}
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uint32_t scpi_sys_power_state(uint64_t system_state)
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{
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uint32_t *response;
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size_t size;
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mhu_secure_message_start();
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mmio_write_8(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, system_state);
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mhu_secure_message_send(scpi_cmd(SCPI_CMD_SET_SYS_POWER_STATE, 1));
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scpi_secure_message_receive((void *)&response, &size);
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mhu_secure_message_end();
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return *response;
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}
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void scpi_jtag_set_state(uint32_t state, uint8_t select)
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{
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assert(state <= GXBB_JTAG_STATE_OFF);
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if (select > GXBB_JTAG_A53_EE) {
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WARN("BL31: Invalid JTAG select (0x%x).\n", select);
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return;
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}
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mhu_secure_message_start();
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD,
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(state << 8) | (uint32_t)select);
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mhu_secure_message_send(scpi_cmd(SCPI_CMD_JTAG_SET_STATE, 4));
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mhu_secure_message_wait();
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mhu_secure_message_end();
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}
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uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size)
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{
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uint32_t *response;
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size_t resp_size;
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if (size > 0x1FC)
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return 0;
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mhu_secure_message_start();
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, base);
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 4, size);
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mhu_secure_message_send(scpi_cmd(SCPI_CMD_EFUSE_READ, 8));
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scpi_secure_message_receive((void *)&response, &resp_size);
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mhu_secure_message_end();
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/*
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* response[0] is the size of the response message.
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* response[1 ... N] are the contents.
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*/
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if (*response != 0)
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memcpy(dst, response + 1, *response);
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return *response;
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}
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void scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
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uint32_t arg2, uint32_t arg3)
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{
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mhu_secure_message_start();
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x0, arg0);
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x4, arg1);
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x8, arg2);
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mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0xC, arg3);
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mhu_secure_message_send(scpi_cmd(0xC3, 16));
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mhu_secure_message_wait();
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mhu_secure_message_end();
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}
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