140 lines
3.6 KiB
C
140 lines
3.6 KiB
C
/*
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* Copyright (c) 2015-2020, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <common/interrupt_props.h>
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#include <drivers/arm/gicv3.h>
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#include "gicv3_private.h"
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/*******************************************************************************
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* GIC Redistributor functions
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* Note: The raw register values correspond to multiple interrupt `id`s and
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* the number of interrupt `id`s involved depends on the register accessed.
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******************************************************************************/
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/*
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* Accessors to read/write the GIC Redistributor IPRIORITYR and IPRIORITYRE
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* register corresponding to the interrupt `id`, 4 interrupts IDs at a time.
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*/
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unsigned int gicr_read_ipriorityr(uintptr_t base, unsigned int id)
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{
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return GICR_READ(IPRIORITY, base, id);
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}
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void gicr_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val)
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{
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GICR_WRITE(IPRIORITY, base, id, val);
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}
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/*
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* Accessor to set the byte corresponding to interrupt `id`
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* in GIC Redistributor IPRIORITYR and IPRIORITYRE.
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*/
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void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri)
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{
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GICR_WRITE_8(IPRIORITY, base, id, (uint8_t)(pri & GIC_PRI_MASK));
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}
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/*
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* Accessors to get/set/clear the bit corresponding to interrupt `id`
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* from GIC Redistributor IGROUPR0 and IGROUPRE
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*/
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unsigned int gicr_get_igroupr(uintptr_t base, unsigned int id)
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{
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return GICR_GET_BIT(IGROUP, base, id);
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}
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void gicr_set_igroupr(uintptr_t base, unsigned int id)
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{
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GICR_SET_BIT(IGROUP, base, id);
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}
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void gicr_clr_igroupr(uintptr_t base, unsigned int id)
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{
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GICR_CLR_BIT(IGROUP, base, id);
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}
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/*
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* Accessors to get/set/clear the bit corresponding to interrupt `id`
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* from GIC Redistributor IGRPMODR0 and IGRPMODRE
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*/
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unsigned int gicr_get_igrpmodr(uintptr_t base, unsigned int id)
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{
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return GICR_GET_BIT(IGRPMOD, base, id);
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}
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void gicr_set_igrpmodr(uintptr_t base, unsigned int id)
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{
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GICR_SET_BIT(IGRPMOD, base, id);
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}
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void gicr_clr_igrpmodr(uintptr_t base, unsigned int id)
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{
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GICR_CLR_BIT(IGRPMOD, base, id);
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}
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/*
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* Accessor to write the bit corresponding to interrupt `id`
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* in GIC Redistributor ISENABLER0 and ISENABLERE
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*/
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void gicr_set_isenabler(uintptr_t base, unsigned int id)
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{
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GICR_WRITE_BIT(ISENABLE, base, id);
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}
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/*
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* Accessor to write the bit corresponding to interrupt `id`
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* in GIC Redistributor ICENABLER0 and ICENABLERE
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*/
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void gicr_set_icenabler(uintptr_t base, unsigned int id)
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{
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GICR_WRITE_BIT(ICENABLE, base, id);
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}
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/*
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* Accessor to get the bit corresponding to interrupt `id`
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* in GIC Redistributor ISACTIVER0 and ISACTIVERE
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*/
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unsigned int gicr_get_isactiver(uintptr_t base, unsigned int id)
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{
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return GICR_GET_BIT(ISACTIVE, base, id);
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}
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/*
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* Accessor to clear the bit corresponding to interrupt `id`
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* in GIC Redistributor ICPENDR0 and ICPENDRE
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*/
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void gicr_set_icpendr(uintptr_t base, unsigned int id)
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{
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GICR_WRITE_BIT(ICPEND, base, id);
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}
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/*
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* Accessor to write the bit corresponding to interrupt `id`
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* in GIC Redistributor ISPENDR0 and ISPENDRE
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*/
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void gicr_set_ispendr(uintptr_t base, unsigned int id)
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{
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GICR_WRITE_BIT(ISPEND, base, id);
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}
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/*
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* Accessor to set the bit fields corresponding to interrupt `id`
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* in GIC Redistributor ICFGR0, ICFGR1 and ICFGRE
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*/
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void gicr_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg)
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{
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/* Interrupt configuration is a 2-bit field */
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unsigned int bit_shift = BIT_NUM(ICFG, id) << 1U;
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/* Clear the field, and insert required configuration */
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mmio_clrsetbits_32(base + GICR_OFFSET(ICFG, id),
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(uint32_t)GIC_CFG_MASK << bit_shift,
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(cfg & GIC_CFG_MASK) << bit_shift);
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}
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