Antonio Nino Diaz ccbec91c0c Apply workaround for errata 813419 of Cortex-A57 ... TLBI instructions for EL3 won't have the desired effect under specific circumstances in Cortex-A57 r0p0. The workaround is to execute DSB and TLBI twice each time. Even though this errata is only needed in r0p0, the current errata framework is not prepared to apply run-time workarounds. The current one is always applied if compiled in, regardless of the CPU or its revision. This errata has been enabled for Juno. The `DSB` instruction used when initializing the translation tables has been changed to `DSB ISH` as an optimization and to be consistent with the barriers used for the workaround. Change-Id: Ifc1d70b79cb5e0d87e90d88d376a59385667d338 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>		2017-03-08 14:40:27 +00:00
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aarch32	Add PLAT_xxx_ADDR_SPACE_SIZE definitions	2016-12-13 15:35:15 +00:00
aarch64	Apply workaround for errata 813419 of Cortex-A57	2017-03-08 14:40:27 +00:00
xlat_tables_common.c	Forbid block descriptors in initial xlat table levels	2016-12-13 15:38:19 +00:00
xlat_tables_private.h	Forbid block descriptors in initial xlat table levels	2016-12-13 15:38:19 +00:00