40 lines
1.0 KiB
C
40 lines
1.0 KiB
C
/*
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* Copyright (c) 2019, Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLATFORM_PRIVATE_H
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#define PLATFORM_PRIVATE_H
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/*******************************************************************************
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* Function and variable prototypes
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******************************************************************************/
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void socfgpa_configure_mmu_el3(unsigned long total_base,
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unsigned long total_size,
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unsigned long ro_start,
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unsigned long ro_limit,
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unsigned long coh_start,
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unsigned long coh_limit);
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void socfpga_configure_mmu_el1(unsigned long total_base,
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unsigned long total_size,
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unsigned long ro_start,
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unsigned long ro_limit,
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unsigned long coh_start,
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unsigned long coh_limit);
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void socfpga_delay_timer_init(void);
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void socfpga_gic_driver_init(void);
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uint32_t socfpga_get_spsr_for_bl32_entry(void);
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uint32_t socfpga_get_spsr_for_bl33_entry(void);
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unsigned long socfpga_get_ns_image_entrypoint(void);
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#endif /* PLATFORM_PRIVATE_H */
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