arm-trusted-firmware/bl2/aarch32
Bryan O'Donoghue eb20f04ef3 bl2-el3: Fix exit to bl32 by ensuring a more complete write to SPSR
Prior to entry into BL32 we set the SPSR by way of msr spsr, r1.
This unfortunately only writes the bits f->[31:24] and c->[7:0].

This patch updates the bl2 exit path to write the x->[15:8] and c->[7:0]
fields of the SPSR. For the purposes of initial setup of the SPSR the x and
c fields should be sufficient and importantly will capture the necessary
lower-order control bits that f:c alone do not.

This is important to do to ensure the SPSR is set to the mode the platform
intends prior to performing an eret.

Fixes: b1d27b484f ("bl2-el3: Add BL2_EL3 image")

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-03-13 10:08:21 +00:00
..
bl2_arch_setup.c correct some missing-prototype warnings 2018-12-10 18:09:49 +01:00
bl2_el3_entrypoint.S bl2-el3: Fix exit to bl32 by ensuring a more complete write to SPSR 2019-03-13 10:08:21 +00:00
bl2_el3_exceptions.S Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
bl2_entrypoint.S BL2: Enable pointer authentication support 2019-02-27 11:58:09 +00:00