69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __BOARD_CSS_DEF_H__
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#define __BOARD_CSS_DEF_H__
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#include <common_def.h>
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#include <soc_css_def.h>
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#include <utils_def.h>
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#include <v2m_def.h>
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/*
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* Definitions common to all ARM CSS-based development platforms
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*/
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/* Platform ID address */
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#define BOARD_CSS_PLAT_ID_REG_ADDR 0x7ffe00e0
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/* Platform ID related accessors */
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#define BOARD_CSS_PLAT_ID_REG_ID_MASK 0x0f
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#define BOARD_CSS_PLAT_ID_REG_ID_SHIFT 0x0
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#define BOARD_CSS_PLAT_ID_REG_VERSION_MASK 0xf00
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#define BOARD_CSS_PLAT_ID_REG_VERSION_SHIFT 0x8
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#define BOARD_CSS_PLAT_TYPE_RTL 0x00
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#define BOARD_CSS_PLAT_TYPE_FPGA 0x01
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#define BOARD_CSS_PLAT_TYPE_EMULATOR 0x02
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#define BOARD_CSS_PLAT_TYPE_FVP 0x03
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#ifndef __ASSEMBLY__
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#include <mmio.h>
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#define BOARD_CSS_GET_PLAT_TYPE(addr) \
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((mmio_read_32(addr) & BOARD_CSS_PLAT_ID_REG_ID_MASK) \
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>> BOARD_CSS_PLAT_ID_REG_ID_SHIFT)
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#endif /* __ASSEMBLY__ */
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/*
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* Required platform porting definitions common to all ARM CSS-based
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* development platforms
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*/
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#define PLAT_ARM_DRAM2_SIZE ULL(0x180000000)
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/* UART related constants */
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#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_UART0_BASE
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#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART0_CLK_IN_HZ
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#define PLAT_ARM_BL31_RUN_UART_BASE SOC_CSS_UART1_BASE
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#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
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#define PLAT_ARM_SP_MIN_RUN_UART_BASE SOC_CSS_UART1_BASE
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#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART0_BASE
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#define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ
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#endif /* __BOARD_CSS_DEF_H__ */
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