112 lines
3.0 KiB
Makefile
112 lines
3.0 KiB
Makefile
#
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# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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JUNO_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
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drivers/arm/gic/v2/gicv2_main.c \
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drivers/arm/gic/v2/gicv2_helpers.c \
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plat/common/plat_gicv2.c \
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plat/arm/common/arm_gicv2.c
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JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \
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plat/arm/common/arm_cci.c
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JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
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plat/arm/board/juno/juno_security.c \
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plat/arm/board/juno/juno_trng.c \
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plat/arm/common/arm_tzc400.c
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ifneq (${ENABLE_STACK_PROTECTOR}, 0)
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JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c
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endif
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PLAT_INCLUDES := -Iplat/arm/board/juno/include
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PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S
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# Flag to enable support for AArch32 state on JUNO
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JUNO_AARCH32_EL3_RUNTIME := 0
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$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
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$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
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ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
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# Include BL32 in FIP
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NEED_BL32 := yes
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# BL31 is not required
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override BL31_SOURCES =
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# The BL32 needs to be built separately invoking the AARCH32 compiler and
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# be specifed via `BL32` build option.
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ifneq (${ARCH}, aarch32)
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override BL32_SOURCES =
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endif
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endif
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ifeq (${ARCH},aarch64)
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BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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plat/arm/board/juno/juno_bl1_setup.c \
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${JUNO_INTERCONNECT_SOURCES} \
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${JUNO_SECURITY_SOURCES}
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BL2_SOURCES += plat/arm/board/juno/juno_bl2_setup.c \
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${JUNO_SECURITY_SOURCES}
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BL2U_SOURCES += ${JUNO_SECURITY_SOURCES}
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BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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plat/arm/board/juno/juno_topology.c \
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${JUNO_GIC_SOURCES} \
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${JUNO_INTERCONNECT_SOURCES} \
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${JUNO_SECURITY_SOURCES}
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endif
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# Errata workarounds for Cortex-A53:
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ERRATA_A53_826319 := 1
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ERRATA_A53_835769 := 1
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ERRATA_A53_836870 := 1
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ERRATA_A53_843419 := 1
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ERRATA_A53_855873 := 1
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# Errata workarounds for Cortex-A57:
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ERRATA_A57_806969 := 0
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ERRATA_A57_813419 := 1
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ERRATA_A57_813420 := 1
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ERRATA_A57_826974 := 1
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ERRATA_A57_826977 := 1
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ERRATA_A57_828024 := 1
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ERRATA_A57_829520 := 1
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ERRATA_A57_833471 := 1
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ERRATA_A57_859972 := 0
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# Errata workarounds for Cortex-A72:
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ERRATA_A72_859971 := 0
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# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
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# power down sequence
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SKIP_A57_L1_FLUSH_PWR_DWN := 1
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# Disable the PSCI platform compatibility layer
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ENABLE_PLAT_COMPAT := 0
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# Enable memory map related constants optimisation
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ARM_BOARD_OPTIMISE_MEM := 1
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# Do not enable SVE
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ENABLE_SVE_FOR_NS := 0
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# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
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# SCP during power management operations and for SCP RAM Firmware transfer.
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CSS_USE_SCMI_SDS_DRIVER := 1
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include plat/arm/board/common/board_css.mk
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include plat/arm/common/arm_common.mk
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include plat/arm/soc/common/soc_css.mk
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include plat/arm/css/common/css_common.mk
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