114 lines
4.1 KiB
ArmAsm
114 lines
4.1 KiB
ArmAsm
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <platform_def.h>
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.weak plat_report_exception
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.weak plat_crash_console_init
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.weak plat_crash_console_putc
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.weak plat_reset_handler
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.weak plat_disable_acp
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#if !ENABLE_PLAT_COMPAT
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.globl platform_get_core_pos
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#define MPIDR_RES_BIT_MASK 0xff000000
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/* ------------------------------------------------------------------
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* int platform_get_core_pos(int mpidr)
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* Returns the CPU index of the CPU specified by mpidr. This is
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* defined when platform compatibility is disabled to enable Trusted
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* Firmware components like SPD using the old platform API to work.
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* This API is deprecated and it assumes that the mpidr specified is
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* that of a valid and present CPU. Instead, plat_my_core_pos()
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* should be used for CPU index of the current CPU and
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* plat_core_pos_by_mpidr() should be used for CPU index of a
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* CPU specified by its mpidr.
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* ------------------------------------------------------------------
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*/
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func_deprecated platform_get_core_pos
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bic x0, x0, #MPIDR_RES_BIT_MASK
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mrs x1, mpidr_el1
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bic x1, x1, #MPIDR_RES_BIT_MASK
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cmp x0, x1
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beq plat_my_core_pos
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b platform_core_pos_helper
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endfunc_deprecated platform_get_core_pos
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#endif
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform.
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* -----------------------------------------------------
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*/
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func plat_report_exception
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ret
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endfunc plat_report_exception
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform.
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* -----------------------------------------------------
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*/
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func plat_crash_console_init
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mov x0, #0
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ret
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endfunc plat_crash_console_init
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform.
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* -----------------------------------------------------
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*/
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func plat_crash_console_putc
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ret
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endfunc plat_crash_console_putc
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform. This function should preserve x10.
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* -----------------------------------------------------
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*/
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func plat_reset_handler
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ret
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endfunc plat_reset_handler
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform. This function is allowed to use
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* registers x0 - x17.
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* -----------------------------------------------------
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*/
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func plat_disable_acp
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ret
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endfunc plat_disable_acp
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