Masahisa Kojima 0922e481e5 xlat_tables_v2: add base table section name parameter for spm_mm ... Core spm_mm code expects the translation tables are located in the inner & outer WBWA & shareable memory. REGISTER_XLAT_CONTEXT2 macro is used to specify the translation table section in spm_mm. In the commit 363830df1c (xlat_tables_v2: merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE}), REGISTER_XLAT_CONTEXT2 macro explicitly specifies the base xlat table goes into .bss by default. This change affects the existing SynQuacer spm_mm implementation. plat/socionext/synquacer/include/plat.ld.S linker script intends to locate ".bss.sp_base_xlat_table" into "sp_xlat_table" section, but this implementation is no longer available. This patch adds the base table section name parameter for REGISTER_XLAT_CONTEXT2 so that platform can specify the inner & outer WBWA & shareable memory for spm_mm base xlat table. If PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME is not defined, base xlat table goes into .bss by default, the result is same as before. Change-Id: Ie0e1a235e5bd4288dc376f582d6c44c5df6d31b2 Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>		2020-06-02 14:53:06 +09:00
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aarch64	Prevent speculative execution past ERET	2020-01-22 21:42:51 +00:00
spm_mm.mk	spm-mm: Rename aarch64 assembly files	2019-12-20 16:04:49 +00:00
spm_mm_main.c	spm-mm: Rename source files	2019-12-20 16:04:35 +00:00
spm_mm_private.h	spm-mm: Rename spm_private.h	2019-12-20 16:04:20 +00:00
spm_mm_setup.c	SPMD: Adds partially supported EL2 registers.	2020-03-03 11:38:26 +00:00
spm_mm_shim_private.h	spm-mm: Rename spm_shim_private.h	2019-12-20 16:04:27 +00:00
spm_mm_xlat.c	xlat_tables_v2: add base table section name parameter for spm_mm	2020-06-02 14:53:06 +09:00