Achin Gupta ec3c10039b Simplify management of SCTLR_EL3 and SCTLR_EL1 ... This patch reworks the manner in which the M,A, C, SA, I, WXN & EE bits of SCTLR_EL3 & SCTLR_EL1 are managed. The EE bit is cleared immediately after reset in EL3. The I, A and SA bits are set next in EL3 and immediately upon entry in S-EL1. These bits are no longer managed in the blX_arch_setup() functions. They do not have to be saved and restored either. The M, WXN and optionally the C bit are set in the enable_mmu_elX() function. This is done during both the warm and cold boot paths. Fixes ARM-software/tf-issues#226 Change-Id: Ie894d1a07b8697c116960d858cd138c50bc7a069		2014-07-28 10:10:22 +01:00
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aarch64	Simplify management of SCTLR_EL3 and SCTLR_EL1	2014-07-28 10:10:22 +01:00
bakery_lock.h	Remove calling CPU mpidr from bakery lock API	2014-06-23 23:16:39 +01:00
cassert.h	Separate out CASSERT macro into own header	2014-05-06 12:35:02 +01:00
io_storage.h	Remove variables from .data section	2014-05-06 17:55:38 +01:00
mmio.h	Inline the mmio accessor functions	2014-06-24 14:30:23 +01:00
semihosting.h	Remove variables from .data section	2014-05-06 17:55:38 +01:00
spinlock.h	Always use named structs in header files	2014-05-06 13:57:48 +01:00