61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/*
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* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SECURITY_ENGINE_H
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#define SECURITY_ENGINE_H
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/*******************************************************************************
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* Structure definition
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******************************************************************************/
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/* Security Engine Linked List */
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struct tegra_se_ll {
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/* DMA buffer address */
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uint32_t addr;
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/* Data length in DMA buffer */
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uint32_t data_len;
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};
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#define SE_LL_MAX_BUFFER_NUM 4
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typedef struct tegra_se_io_lst {
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volatile uint32_t last_buff_num;
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volatile struct tegra_se_ll buffer[SE_LL_MAX_BUFFER_NUM];
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} tegra_se_io_lst_t __attribute__((aligned(4)));
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/* SE device structure */
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typedef struct tegra_se_dev {
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/* Security Engine ID */
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const int se_num;
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/* SE base address */
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const uint64_t se_base;
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/* SE context size in AES blocks */
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const uint32_t ctx_size_blks;
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/* pointer to source linked list buffer */
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tegra_se_io_lst_t *src_ll_buf;
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/* pointer to destination linked list buffer */
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tegra_se_io_lst_t *dst_ll_buf;
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/* LP context buffer pointer */
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uint32_t *ctx_save_buf;
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} tegra_se_dev_t;
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/* PKA1 device structure */
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typedef struct tegra_pka_dev {
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/* PKA1 base address */
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uint64_t pka_base;
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} tegra_pka_dev_t;
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/*******************************************************************************
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* Public interface
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******************************************************************************/
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void tegra_se_init(void);
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int tegra_se_suspend(void);
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void tegra_se_resume(void);
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int tegra_se_save_tzram(void);
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int32_t tegra_se_save_sha256_hash(uint64_t bl31_base, uint32_t src_len_inbyte);
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#endif /* SECURITY_ENGINE_H */
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