Masahiro Yamada dd53cfe19f uniphier: prepare uniphier_soc_info() for next SoC ... The revision register address will be changed in the next SoC. The LSI revision is needed in order to know where the revision register is located, but you need to read out the revision register for that. This is impossible. We need to know the revision register address by other means. Use BL_CODE_BASE, where the base address of the TF image that is currently running. If it is bigger than 0x80000000 (i.e. the DRAM base is 0x80000000), we assume it is a legacy SoC. Change-Id: I9d7f4325fe2085a8a1ab5310025e5948da611256 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>		2020-02-26 17:55:11 +09:00
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synquacer	pl011: Use generic console_t data structure	2020-02-25 09:34:38 +00:00
uniphier	uniphier: prepare uniphier_soc_info() for next SoC	2020-02-26 17:55:11 +09:00