Soby Mathew f4f1ae777b Demonstrate model for routing IRQs to EL3 ... This patch provides an option to specify a interrupt routing model where non-secure interrupts (IRQs) are routed to EL3 instead of S-EL1. When such an interrupt occurs, the TSPD arranges a return to the normal world after saving any necessary context. The interrupt routing model to route IRQs to EL3 is enabled only during STD SMC processing. Thus the pre-emption of S-EL1 is disabled during Fast SMC and Secure Interrupt processing. A new build option TSPD_ROUTE_NS_INT_EL3 is introduced to change the non secure interrupt target execution level to EL3. Fixes ARM-software/tf-issues#225 Change-Id: Ia1e779fbbb6d627091e665c73fa6315637cfdd32		2015-01-26 15:29:32 +00:00
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tspd.mk	Demonstrate model for routing IRQs to EL3	2015-01-26 15:29:32 +00:00
tspd_common.c	Rework the TSPD setup code	2014-08-01 09:46:52 +01:00
tspd_helpers.S	Reduce deep nesting of header files	2014-05-06 13:57:48 +01:00
tspd_main.c	Demonstrate model for routing IRQs to EL3	2015-01-26 15:29:32 +00:00
tspd_pm.c	Demonstrate model for routing IRQs to EL3	2015-01-26 15:29:32 +00:00
tspd_private.h	Demonstrate model for routing IRQs to EL3	2015-01-26 15:29:32 +00:00