122 lines
3.8 KiB
C
122 lines
3.8 KiB
C
/*
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* Copyright (c) 2016-2022, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <bl32/sp_min/platform_sp_min.h>
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#include <common/debug.h>
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#include <lib/fconf/fconf.h>
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#include <lib/fconf/fconf_dyn_cfg_getter.h>
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#include <plat/arm/common/plat_arm.h>
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#include "../fvp_private.h"
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void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
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u_register_t arg2, u_register_t arg3)
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{
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const struct dyn_cfg_dtb_info_t *tos_fw_config_info __unused;
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/* Initialize the console to provide early debug support */
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arm_console_boot_init();
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#if !RESET_TO_SP_MIN && !BL2_AT_EL3
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INFO("SP_MIN FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1);
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/* Fill the properties struct with the info from the config dtb */
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fconf_populate("FW_CONFIG", arg1);
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tos_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TOS_FW_CONFIG_ID);
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if (tos_fw_config_info != NULL) {
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arg1 = tos_fw_config_info->config_addr;
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}
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#endif /* !RESET_TO_SP_MIN && !BL2_AT_EL3 */
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arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
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/* Initialize the platform config for future decision making */
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fvp_config_setup();
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/*
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* Initialize the correct interconnect for this cluster during cold
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* boot. No need for locks as no other CPU is active.
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*/
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fvp_interconnect_init();
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/*
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* Enable coherency in interconnect for the primary CPU's cluster.
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* Earlier bootloader stages might already do this (e.g. Trusted
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* Firmware's BL1 does it) but we can't assume so. There is no harm in
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* executing this code twice anyway.
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* FVP PSCI code will enable coherency for other clusters.
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*/
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fvp_interconnect_enable();
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}
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void sp_min_plat_arch_setup(void)
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{
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int rc __unused;
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const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
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uintptr_t hw_config_base_align __unused;
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size_t mapped_size_align __unused;
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arm_sp_min_plat_arch_setup();
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/*
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* For RESET_TO_SP_MIN systems, SP_MIN(BL32) is the first bootloader
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* to run. So there is no BL2 to load the HW_CONFIG dtb into memory
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* before control is passed to SP_MIN.
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* Also, BL2 skips loading HW_CONFIG dtb for BL2_AT_EL3 builds.
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* The code below relies on dynamic mapping capability, which is not
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* supported by xlat tables lib V1.
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* TODO: remove the ARM_XLAT_TABLES_LIB_V1 check when its support
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* gets deprecated.
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*/
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#if !RESET_TO_SP_MIN && !BL2_AT_EL3 && !ARM_XLAT_TABLES_LIB_V1
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hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
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assert(hw_config_info != NULL);
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assert(hw_config_info->config_addr != 0UL);
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INFO("SP_MIN FCONF: HW_CONFIG address = %p\n",
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(void *)hw_config_info->config_addr);
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/*
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* Preferrably we expect this address and size are page aligned,
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* but if they are not then align it.
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*/
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hw_config_base_align = page_align(hw_config_info->config_addr, DOWN);
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mapped_size_align = page_align(hw_config_info->config_max_size, UP);
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if ((hw_config_info->config_addr != hw_config_base_align) &&
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(hw_config_info->config_max_size == mapped_size_align)) {
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mapped_size_align += PAGE_SIZE;
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}
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/*
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* map dynamically HW config region with its aligned base address and
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* size
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*/
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rc = mmap_add_dynamic_region((unsigned long long)hw_config_base_align,
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hw_config_base_align,
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mapped_size_align,
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MT_RO_DATA);
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if (rc != 0) {
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ERROR("Error while mapping HW_CONFIG device tree (%d).\n", rc);
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panic();
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}
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/* Populate HW_CONFIG device tree with the mapped address */
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fconf_populate("HW_CONFIG", hw_config_info->config_addr);
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/* unmap the HW_CONFIG memory region */
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rc = mmap_remove_dynamic_region(hw_config_base_align, mapped_size_align);
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if (rc != 0) {
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ERROR("Error while unmapping HW_CONFIG device tree (%d).\n",
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rc);
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panic();
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}
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#endif /* !RESET_TO_SP_MIN && !BL2_AT_EL3 && !ARM_XLAT_TABLES_LIB_V1 */
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}
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