Soby Mathew 683f788fa7 Fix the Cortex-A57 reset handler register usage ... The CPU specific reset handlers no longer have the freedom of using any general purpose register because it is being invoked by the BL3-1 entry point in addition to BL1. The Cortex-A57 CPU specific reset handler was overwriting x20 register which was being used by the BL3-1 entry point to save the entry point information. This patch fixes this bug by reworking the register allocation in the Cortex-A57 reset handler to avoid using x20. The patch also explicitly mentions the register clobber list for each of the callee functions invoked by the reset handler Change-Id: I28fcff8e742aeed883eaec8f6c4ee2bd3fce30df		2015-01-30 13:57:57 +00:00
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diagrams	Document design of the Interrupt Mangement Framework	2014-06-03 18:42:14 +01:00
change-log.md	Documentation for version 1.0	2014-08-28 14:24:54 +01:00
cpu-specific-build-macros.md	Create Table of Content links in markdown files	2015-01-07 15:01:07 +01:00
firmware-design.md	Fix the Cortex-A57 reset handler register usage	2015-01-30 13:57:57 +00:00
interrupt-framework-design.md	Create Table of Content links in markdown files	2015-01-07 15:01:07 +01:00
optee-dispatcher.md	Add opteed based on tspd	2014-09-16 11:51:54 -07:00
porting-guide.md	Fix the Cortex-A57 reset handler register usage	2015-01-30 13:57:57 +00:00
rt-svc-writers-guide.md	Create Table of Content links in markdown files	2015-01-07 15:01:07 +01:00
user-guide.md	Merge pull request #248 from jcastillo-arm/jc/tf-issues/212_1	2015-01-28 10:42:32 +00:00