Chris Kay 6c8dda19e5 refactor(amu)!: remove `PLAT_AMU_GROUP1_COUNTERS_MASK` ... With the introduction of MPMM, the auxiliary AMU counter logic requires refactoring to move away from a single platform-defined group 1 counter mask in order to support microarchitectural (per-core) group 1 counters. BREAKING CHANGE: The `PLAT_AMU_GROUP1_COUNTERS_MASK` platform definition has been removed. Platforms should specify per-core AMU counter masks via FCONF or a platform-specific mechanism going forward. Change-Id: I1e852797c7954f92409222b066a1ae57bc72bb05 Signed-off-by: Chris Kay <chris.kay@arm.com>		2021-10-26 12:14:30 +01:00
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arch	fix(pie): invalidate data cache in the entire image range if PIE is enabled	2021-10-19 21:30:56 +02:00
bl1	Specify signed-ness of constants	2020-08-14 11:36:05 +00:00
bl2	BL2_AT_EL3: Enable pointer authentication support	2019-02-27 11:58:09 +00:00
bl2u	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
bl31	feat(rme): add ENABLE_RME build option and support for RMM image	2021-10-05 11:49:59 -05:00
bl32	spd: tlkd: support new TLK SMCs for RPMB service	2020-03-21 19:00:05 -07:00
common	feat(fdt-wrappers): add CPU enumeration utility function	2021-10-26 12:14:29 +01:00
drivers	Merge "fix(scmi): relax requirement for exact protocol version" into integration	2021-10-19 10:58:09 +02:00
dt-bindings	feat(dt-bindings): add STM32MP1 TZC400 bindings	2021-09-07 09:14:05 +02:00
export	feat(rme): add ENABLE_RME build option and support for RMM image	2021-10-05 11:49:59 -05:00
lib	refactor(amu)!: remove `PLAT_AMU_GROUP1_COUNTERS_MASK`	2021-10-26 12:14:30 +01:00
plat	feat(plat/fvp): pass Event Log addr and size from BL1 to BL2	2021-10-12 17:53:48 +01:00
services	feat(rme): add Test Realm Payload (TRP)	2021-10-05 18:41:07 +02:00
tools_share	feat(rme): add ENABLE_RME build option and support for RMM image	2021-10-05 11:49:59 -05:00