Marcin Wojtas 4acd900df6 gicv2: enable configuring IRQ trigger type ... This patch introduces new helper routines that allow configuring the individual IRQs to be edge/level-triggered via GICD_ICFGR registers. This is helpful to modify the default configuration of the non-secure GIC SPI's, which are all set during initialization to be level-sensitive. Change-Id: I23deb4a0381691a686a3cda52405aa1dfd5e56f2 Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>		2018-09-03 15:46:14 +03:00
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cryptocell	Fix order of #includes	2017-07-12 14:45:31 +01:00
arm_gic.h	libc: Fix all includes in codebase	2018-08-22 10:26:05 +01:00
arm_gicv3_common.h	GICv3: add functions for save and restore	2017-10-05 16:47:53 +01:00
cci.h	CCI: Adapt for specific product at run time	2017-08-01 14:33:47 +01:00
cci400.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
ccn.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
gic_common.h	EHF: MISRA fixes	2018-08-20 09:05:39 +01:00
gic_v2.h	ARM platforms: Migrate to using interrupt properties	2017-10-16 16:50:02 +01:00
gic_v3.h	libc: Fix all includes in codebase	2018-08-22 10:26:05 +01:00
gicv2.h	gicv2: enable configuring IRQ trigger type	2018-09-03 15:46:14 +03:00
gicv3.h	libc: Fix all includes in codebase	2018-08-22 10:26:05 +01:00
nic_400.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
pl011.h	libc: Fix all includes in codebase	2018-08-22 10:26:05 +01:00
pl061_gpio.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
smmu_v3.h	Add SMMUv3 driver	2017-08-01 14:33:47 +01:00
sp804_delay_timer.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
sp805.h	Fix MISRA defects in SP805 driver	2018-07-30 09:30:15 +01:00
tzc400.h	Fix MISRA rule 8.3 Part 1	2018-02-28 17:19:55 +00:00
tzc_common.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
tzc_dmc500.h	DMC500: Add platform support to set system interface count	2018-04-09 17:06:52 +05:30