arm-trusted-firmware/lib/cpus/aarch64
Dimitris Papastamos eec9e7d1e6 Print erratum application report for CVE-2017-5715
Even though the workaround for CVE-2017-5715 is not a CPU erratum, the
code is piggybacking on the errata framework to print whether the
workaround was applied, missing or not needed.

Change-Id: I821197a4b8560c73fd894cd7cd9ecf9503c72fa3
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-01-18 10:36:10 +00:00
..
aem_generic.S Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
cortex_a35.S Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
cortex_a53.S CPU: Correct names of implementation-defined aux regs 2017-08-29 13:52:48 +01:00
cortex_a55.S Fix order of #includes 2017-07-12 14:45:31 +01:00
cortex_a57.S Print erratum application report for CVE-2017-5715 2018-01-18 10:36:10 +00:00
cortex_a72.S Print erratum application report for CVE-2017-5715 2018-01-18 10:36:10 +00:00
cortex_a73.S Print erratum application report for CVE-2017-5715 2018-01-18 10:36:10 +00:00
cortex_a75.S Print erratum application report for CVE-2017-5715 2018-01-18 10:36:10 +00:00
cortex_a75_pubsub.c Add hooks to save/restore AMU context for Cortex A75 2018-01-11 14:37:20 +00:00
cpu_helpers.S Use a callee-saved register to be AAPCS-compliant 2017-05-24 14:23:08 +01:00
denver.S Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
workaround_cve_2017_5715_bpiall.S Workaround for CVE-2017-5715 on Cortex A73 and A75 2018-01-11 10:26:15 +00:00
workaround_cve_2017_5715_mmu.S Workaround for CVE-2017-5715 on Cortex A57 and A72 2018-01-11 10:26:15 +00:00