139 lines
3.3 KiB
C
139 lines
3.3 KiB
C
/*
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* Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <drivers/arm/gic600_multichip.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <sgi_soc_platform_def_v2.h>
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#include <sgi_plat.h>
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#if defined(IMAGE_BL31)
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#if (CSS_SGI_PLATFORM_VARIANT == 2)
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static const mmap_region_t rdn2mc_dynamic_mmap[] = {
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#if CSS_SGI_CHIP_COUNT > 1
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ARM_MAP_SHARED_RAM_REMOTE_CHIP(1),
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CSS_SGI_MAP_DEVICE_REMOTE_CHIP(1),
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#endif
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#if CSS_SGI_CHIP_COUNT > 2
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ARM_MAP_SHARED_RAM_REMOTE_CHIP(2),
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CSS_SGI_MAP_DEVICE_REMOTE_CHIP(2),
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#endif
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#if CSS_SGI_CHIP_COUNT > 3
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ARM_MAP_SHARED_RAM_REMOTE_CHIP(3),
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CSS_SGI_MAP_DEVICE_REMOTE_CHIP(3),
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#endif
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};
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#endif
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#if (CSS_SGI_PLATFORM_VARIANT == 2)
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static struct gic600_multichip_data rdn2mc_multichip_data __init = {
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.rt_owner_base = PLAT_ARM_GICD_BASE,
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.rt_owner = 0,
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.chip_count = CSS_SGI_CHIP_COUNT,
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.chip_addrs = {
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PLAT_ARM_GICD_BASE >> 16,
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#if CSS_SGI_CHIP_COUNT > 1
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(PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1)) >> 16,
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#endif
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#if CSS_SGI_CHIP_COUNT > 2
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(PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2)) >> 16,
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#endif
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#if CSS_SGI_CHIP_COUNT > 3
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(PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3)) >> 16,
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#endif
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},
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.spi_ids = {
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{32, 479},
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#if CSS_SGI_CHIP_COUNT > 1
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{0, 0},
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#endif
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#if CSS_SGI_CHIP_COUNT > 2
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{0, 0},
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#endif
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#if CSS_SGI_CHIP_COUNT > 3
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{0, 0},
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#endif
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}
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};
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#endif
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#if (CSS_SGI_PLATFORM_VARIANT == 2)
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static uintptr_t rdn2mc_multichip_gicr_frames[] = {
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/* Chip 0's GICR Base */
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PLAT_ARM_GICR_BASE,
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#if CSS_SGI_CHIP_COUNT > 1
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/* Chip 1's GICR BASE */
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PLAT_ARM_GICR_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1),
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#endif
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#if CSS_SGI_CHIP_COUNT > 2
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/* Chip 2's GICR BASE */
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PLAT_ARM_GICR_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2),
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#endif
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#if CSS_SGI_CHIP_COUNT > 3
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/* Chip 3's GICR BASE */
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PLAT_ARM_GICR_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3),
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#endif
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UL(0) /* Zero Termination */
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};
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#endif
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#endif /* IMAGE_BL31 */
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unsigned int plat_arm_sgi_get_platform_id(void)
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{
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return mmio_read_32(SID_REG_BASE + SID_SYSTEM_ID_OFFSET)
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& SID_SYSTEM_ID_PART_NUM_MASK;
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}
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unsigned int plat_arm_sgi_get_config_id(void)
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{
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return mmio_read_32(SID_REG_BASE + SID_SYSTEM_CFG_OFFSET);
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}
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unsigned int plat_arm_sgi_get_multi_chip_mode(void)
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{
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return (mmio_read_32(SID_REG_BASE + SID_NODE_ID_OFFSET) &
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SID_MULTI_CHIP_MODE_MASK) >>
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SID_MULTI_CHIP_MODE_SHIFT;
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}
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#if defined(IMAGE_BL31)
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void bl31_platform_setup(void)
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{
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#if (CSS_SGI_PLATFORM_VARIANT == 2)
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int ret;
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unsigned int i;
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if (plat_arm_sgi_get_multi_chip_mode() == 0) {
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ERROR("Chip Count is set to %u but multi-chip mode is not "
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"enabled\n", CSS_SGI_CHIP_COUNT);
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panic();
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} else {
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INFO("Enabling multi-chip support for RD-N2 variant\n");
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for (i = 0; i < ARRAY_SIZE(rdn2mc_dynamic_mmap); i++) {
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ret = mmap_add_dynamic_region(
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rdn2mc_dynamic_mmap[i].base_pa,
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rdn2mc_dynamic_mmap[i].base_va,
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rdn2mc_dynamic_mmap[i].size,
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rdn2mc_dynamic_mmap[i].attr);
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if (ret != 0) {
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ERROR("Failed to add dynamic mmap entry for"
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" i: %d " "(ret=%d)\n", i, ret);
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panic();
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}
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}
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plat_arm_override_gicr_frames(
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rdn2mc_multichip_gicr_frames);
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gic600_multichip_init(&rdn2mc_multichip_data);
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}
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#endif
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sgi_bl31_common_platform_setup();
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}
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#endif /* IMAGE_BL31 */
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