This patch adds support in the TSP to handle FIQ interrupts that are generated when execution is in the TSP. S-EL1 interrupt are handled normally and execution resumes at the instruction where the exception was originally taken. S-EL3 interrupts i.e. any interrupt not recognized by the TSP are handed to the TSPD. Execution resumes normally once such an interrupt has been handled at EL3. Change-Id: Ia3ada9a4fb15670afcc12538a6456f21efe58a8f |
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aarch64 | ||
tsp-fvp.mk | ||
tsp.ld.S | ||
tsp.mk | ||
tsp_interrupt.c | ||
tsp_main.c | ||
tsp_timer.c |